ATTINY13-20MU Atmel, ATTINY13-20MU Datasheet - Page 56

• Manufacturer Part Number: ATTINY13-20MU
• Description: IC MCU AVR 1K FLASH 10MHZ 20-MLF
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY13-20MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 6
• Program Memory Size: 1KB (512 x 16)
• Program Memory Type: FLASH
• Eeprom Size: 64 x 8
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-MLF®, QFN
• Processor Series: ATTINY1x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 64 B
• Interface Type: SPI
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 6
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAKSTK511
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 4 Channel
• Package: 20MLF EP
• Device Core: AVR
• Family Name: ATtiny
• Maximum Speed: 20 MHz
• For Use With: ATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Connectivity: -
• Lead Free Status / Rohs Status: Details

10.4
10.4.1
10.4.2
10.4.3
56
Register Description
ATtiny13
MCUCR – MCU Control Register
PORTB – Port B Data Register
DDRB – Port B Data Direction Register
Table 10-5.
• Bits 7, 2– Res: Reserved Bits
These bits are reserved bits in the ATtiny13 and will always read as zero.
• Bit 6 – PUD: Pull-up Disable
When this bit is written to one, the pull-ups in the I/O ports are disabled even if the DDxn and
PORTxn Registers are configured to enable the pull-ups ({DDxn, PORTxn} = 0b01). See
figuring the Pin” on page 49
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
DIEOE
DIEOV
DI
AIO
PB2/SCK/ADC1/
T0/PCINT2
0
0
0
0
0
0
0
PCINT2 • PCIE + ADC1D
ADC1D
T0/INT0/
PCINT2 Input
ADC1 Input
Overriding Signals for Alternate Functions in PB2:PB0
R
7
–
0
R
R
7
–
0
7
–
0
PUD
R/W
R
R
6
–
0
6
–
0
6
0
for more details about this feature.
PORTB5
DDB5
R/W
R/W
R/W
5
5
0
0
SE
5
0
PB1/MISO/AIN1/
OC0B/INT0/PCINT1
0
0
0
0
OC0B Enable
OC0B
0
PCINT1 • PCIE + AIN1D
AIN1D
PCINT1 Input
Analog Comparator
Negative Input
PORTB4
DDB4
R/W
R/W
4
0
4
0
SM1
R/W
4
0
PORTB3
DDB3
R/W
R/W
3
0
3
0
SM0
R/W
3
0
PORTB2
DDB2
R/W
R/W
2
0
2
0
R
2
–
0
PB0/MOSI/AIN0/
AREF/OC0A/PCINT0
0
0
0
0
OC0A Enable
OC0A
0
PCINT0 • PCIE + AIN0D
AIN0D
PCINT0 Input
Analog Comparator Positive
Input
PORTB1
DDB1
R/W
R/W
ISC01
R/W
1
0
1
0
1
0
PORTB0
DDB0
ISC00
R/W
R/W
R/W
0
0
0
0
0
0
2535J–AVR–08/10
MCUCR
PORTB
DDRB
“Con-