AT89S52-24AU Atmel, AT89S52-24AU Datasheet - Page 9

• Manufacturer Part Number: AT89S52-24AU
• Description: IC MCU 8K FLASH 24MHZ 44-TQFP
• Manufacturer: Atmel
• Series: 89Sr

Specifications of AT89S52-24AU

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 24MHz
• Connectivity: UART/USART
• Peripherals: WDT
• Number Of I /o: 32
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Package: 44TQFP
• Device Core: 8051
• Family Name: 89S
• Maximum Speed: 24 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 32
• Interface Type: UART
• Number Of Timers: 3
• Processor Series: AT89x
• Core: 8051
• Data Ram Size: 256 B
• Maximum Clock Frequency: 24 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: AT89ISP
• Minimum Operating Temperature: - 40 C
• No. Of I/o's: 32
• Ram Memory Size: 256Byte
• Cpu Speed: 24MHz
• No. Of Timers: 3
• Digital Ic Case Style: TQFP
• Supply Voltage Range: 4V To 5.5V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Table 5-3.
Dual Data Pointer Registers: To facilitate accessing both internal and external data memory, two banks of 16-bit Data
Pointer Registers are provided: DP0 at SFR address locations 82H-83H and DP1 at 84H-85H. Bit DPS = 0 in SFR AUXR1
selects DP0 and DPS = 1 selects DP1. The user should ALWAYS initialize the DPS bit to the appropriate value before
accessing the respective Data Pointer Register.
Power Off Flag: The Power Off Flag (POF) is located at bit 4 (PCON.4) in the PCON SFR. POF is set to “1” during power
up. It can be set and rest under software control and is not affected by reset.
Table 5-4.
1919D–MICRO–6/08
AUXR
–
DISALE
DISRTO
WDIDLE
AUXR1
–
DPS
Reserved for future expansion
Disable/Enable ALE
DISALE
0
1
Disable/Enable Reset out
DISRTO
0
1
Disable/Enable WDT in IDLE mode
WDIDLE
0
1
Reserved for future expansion
Data Pointer Register Select
DPS
0
1
AUXR: Auxiliary Register
AUXR1: Auxiliary Register 1
Address = 8EH
Not Bit Addressable
Address = A2H
Not Bit Addressable
Bit
Bit
Operating Mode
ALE is emitted at a constant rate of 1/6 the oscillator frequency
ALE is active only during a MOVX or MOVC instruction
Reset pin is driven High after WDT times out
Reset pin is input only
WDT continues to count in IDLE mode
WDT halts counting in IDLE mode
Selects DPTR Registers DP0L, DP0H
Selects DPTR Registers DP1L, DP1H
–
7
–
7
–
6
–
6
–
5
–
5
WDIDLE
4
–
4
DISRTO
3
–
3
–
2
–
2
Reset Value = XXXXXXX0B
Reset Value = XXX00XX0B
–
1
–
1
DISALE
AT89S52
DPS
0
0
9