AT89LP2052-20SU Atmel, AT89LP2052-20SU Datasheet - Page 89

IC 8051 MCU FLASH 2K 20SOIC

AT89LP2052-20SU

Manufacturer Part Number
AT89LP2052-20SU
Description
IC 8051 MCU FLASH 2K 20SOIC
Manufacturer
Atmel
Series
89LPr
Datasheet

Specifications of AT89LP2052-20SU

Core Processor
8051
Core Size
8-Bit
Speed
20MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SOIC (7.5mm Width)
Processor Series
AT89x
Core
8051
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
UART, SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
15
Number Of Timers
2
Operating Supply Voltage
2.4 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
AT89ISP
Minimum Operating Temperature
- 40 C
Package
20SOIC W
Device Core
8051
Family Name
AT89
Maximum Speed
20 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details
27. Revision History
3547J–MICRO–10/09
Revision A – March 2005
Revision B – June 2005
Revision C – August 2005
Revision D – April 2006
Revision E – June 2006
Revision F – June 2006
Revision G – April 2007
Revision H – May 2007
Revision I – June 2008
Revision J – Oct. 2009
Initial Release
Last paragraph in
In
Changed the Maximum Bit Frequency from f/2 to f/4 in the
“Serial Peripheral Interface” on page
In the
from Shift Register box.
In the
to the following:
Replaced CM3 with CM2 in Bit 2 of register ACSR
In the
made in specific bit positions within the Addr High, Addr Low and Data 0 columns.
Added ROHS compliant device offerings.
In pages 1,
maximum rating for the operating temperature was changed from +125⋅ C to +85⋅ C.
In
In section
from low to high.
Added
Changed TMOD to TCON
Changed SPI = 1 and SPI = 0 to SPE = 1 and SPE = 0
Removed Standard Packaging Offering.
Added R1 option to oscillator connection diagram
Added related oscillator amplitude graphs
Table 16-3 on page
Table 6-1 on page
“SPI Block Diagram” on page
“SPSR – SPI Status Register” on page
“Programming Command Summary” on page
Section 11. “Oscillator Characteristics” on page
7.8 ”Reset” on page 8
82
and 83, the reference to V
÷4÷8÷32÷64
Section 13.2 on page 15
6, changed the SFR address of SPDR from 85H to 86H.
26, changed the SFR address for TCONB from 88H to 91H.
(Table 16-1 on page
changed the polarity of the RST input signal requirement
43, the 16-bit reference was deleted
42.
CC
Figures 11-3 and
was inserted.
= 2.7V were changed to 2.4V. On
46, the Divider ratios were changed
27).
Figure 11-1 on page
(page
AT89LP2052/LP4052
58, several changes were
11.
(Table 19-1 on page
50)
11-5.
11.
45).
page 79
the
89

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