PIC16F689-I/SO Microchip Technology, PIC16F689-I/SO Datasheet - Page 185
![IC PIC MCU FLASH 4KX14 20SOIC](/photos/6/64/66480/150-20-soic_sml.jpg)
PIC16F689-I/SO
Manufacturer Part Number
PIC16F689-I/SO
Description
IC PIC MCU FLASH 4KX14 20SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F690DM-PCTLHS.pdf
(306 pages)
3.PIC16F677-IP.pdf
(2 pages)
4.PIC16F677-IP.pdf
(16 pages)
5.PIC16F677-ISO.pdf
(294 pages)
Specifications of PIC16F689-I/SO
Program Memory Type
FLASH
Program Memory Size
7KB (4K x 14)
Package / Case
20-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
18
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C/SPI/SSP/EUSART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
17
Number Of Timers
2
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163029, DM164120
Minimum Operating Temperature
- 40 C
On-chip Adc
12-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT20SO1-1 - SOCKET TRANS ICE 20DIP TO 20SOICXLT28SO-1 - SOCKET TRANSITION 28SOIC 300MILXLT18SO-1 - SOCKET TRANSITION 18SOIC 300MILAC162061 - HEADER INTRFC MPLAB ICD2 20PINAC164039 - MODULE SKT PROMATE II 20DIP/SOIC
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F690DM-PCTLHS PDF datasheet #2
- PIC16F677-IP PDF datasheet #3
- PIC16F677-IP PDF datasheet #4
- PIC16F677-ISO PDF datasheet #5
- Current page: 185 of 294
- Download datasheet (6Mb)
13.8
In Master mode, all module clocks are halted and the
transmission/reception will remain in that state until the
device wakes from Sleep. After the device returns to
Normal mode, the module will continue to transmit/
receive data.
In Slave mode, the SPI Transmit/Receive Shift register
operates asynchronously to the device. This allows the
device to be placed in Sleep mode and data to be
shifted into the SPI Transmit/Receive Shift register.
When all 8 bits have been received, the SSP interrupt
flag bit will be set and if enabled, will wake the device
from Sleep.
13.9
A Reset disables the SSP module and terminates the
current transfer.
TABLE 13-2:
© 2006 Microchip Technology Inc.
0Bh/8Bh/
10Bh/18Bh
0Ch
13h
14h
86h/186h
87h/187h
8Ch
94h
Legend:
Address
Note 1:
Sleep Operation
Effects of a Reset
x = unknown, u = unchanged, – = unimplemented, read as ‘0’. Shaded cells are not used by the SSP in SPI mode.
INTCON
PIR1
SSPBUF
SSPCON
TRISB
TRISC
PIE1
SSPSTAT
PIC16F687/PIC16F689/PIC16F690 only.
Name
REGISTERS ASSOCIATED WITH SPI OPERATION
Synchronous Serial Port Receive Buffer/Transmit Register
TRISB7 TRISB6 TRISB5 TRISB4
TRISC7 TRISC6 TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0
WCOL
Bit 7
SMP
GIE
—
—
SSPOV
ADIE
Bit 6
PEIE
ADIF
CKE
PIC16F631/677/685/687/689/690
SSPEN
RCIE
RCIF
Bit 5
T0IE
D/A
Preliminary
INTE
TXIE
Bit 4
TXIF
CKP
P
SSPM3
RABIE
SSPIF
SSPIE
Bit 3
—
S
13.10 Bus Mode Compatibility
Table 13-1 shows the compatibility between the
standard SPI modes and the states of the CKP and
CKE control bits.
TABLE 13-1:
There is also a SMP bit which controls when the data is
sampled.
Standard SPI Mode
CCP1IF TMR2IF TMR1IF
CCP1IE TMR2IE TMR1IE
SSPM2
Terminology
Bit 2
T0IF
R/W
—
0, 0
0, 1
1, 0
1, 1
(1)
SSPM1
Bit 1
INTF
UA
—
SPI BUS MODES
SSPM0
RABIF
Bit 0
BF
—
CKP
Control Bits State
0
0
1
1
0000 0000
0000 0000
0000 000x
-000 0000
-000 0000
xxxx xxxx
1111 1111
Value on
1111 ----
POR,
BOR
DS41262C-page 183
uuuu uuuu
0000 0000
0000 0000
0000 000x
-000 0000
-000 0000
CKE
1111 1111
Value on
all other
1111 ----
Resets
1
0
1
0
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