PIC16F1937-I/P Microchip Technology, PIC16F1937-I/P Datasheet - Page 114

IC PIC MCU FLASH 512KX14 40-PDIP

PIC16F1937-I/P

Manufacturer Part Number
PIC16F1937-I/P
Description
IC PIC MCU FLASH 512KX14 40-PDIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr

Specifications of PIC16F1937-I/P

Program Memory Type
FLASH
Program Memory Size
14KB (8K x 14)
Package / Case
40-DIP (0.600", 15.24mm)
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
36
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
EUSART/MI2C/SPI
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
36
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
14-ch x 10-bit
A/d Bit Size
10 bit
A/d Channels Available
14
Height
4.95 mm
Length
53.21 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.8 V
Width
14.73 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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0
PIC16F193X/LF193X
8.5.2
The High-Frequency Internal Oscillator (HFINTOSC) is
a factory calibrated 16 MHz internal clock source. The
frequency of the HFINTOSC can be altered via
software using the OSCTUNE register (Register 8-3).
The output of the HFINTOSC connects to a postscaler
and multiplexer (see Figure 8-1). One of nine
frequencies derived from the HFINTOSC can be
selected via software using the IRCF<3:0> bits of the
OSCCON register. See Section 8.5.7 “Frequency
Select Bits (IRCF)” for more information.
The HFINTOSC is enabled by:
• Configure the IRCF<3:0> bits for the desired HF
• FOSC<2:0> = 100, or
• Set the System Clock Source (SCS) bits of the
The High Frequency Internal Oscillator Ready bit
(HFIOFR) of the OSCSTAT register indicates when the
HFINTOSC is running and can be utilized.
The High Frequency Internal Oscillator Status Locked
bit (HFIOFL) of the OSCSTAT register indicates when
the HFINTOSC is running within 2% of its final value.
The High Frequency Internal Oscillator Status Stable
bit (HFIOFS) of the OSCSTAT register indicates when
the HFINTOSC is running within 0.5% of its final value.
8.5.3
The
(MFINTOSC) is a factory calibrated 500 kHz internal
clock source. The frequency of the MFINTOSC can be
altered via software using the OSCTUNE register
(Register 8-3).
The output of the MFINTOSC connects to a postscaler
and multiplexer (see Figure 8-1). One of nine
frequencies derived from the MFINTOSC can be
selected via software using the IRCF<3:0> bits of the
OSCCON register. See Section 8.5.7 “Frequency
Select Bits (IRCF)” for more information.
The MFINTOSC is enabled by:
• Configure the IRCF<3:0> bits for the desired HF
• FOSC<2:0> = 100, or
• Set the System Clock Source (SCS) bits of the
The Medium Frequency Internal Oscillator Ready bit
(MFIOFR) of the OSCSTAT register indicates when the
MFINTOSC is running and can be utilized.
DS41364A-page 112
frequency (see Register 8-1), and
OSCCON register to ‘1x’
frequency (see Register 8-1), and
OSCCON register to ‘1x’
Medium-Frequency
HFINTOSC
MFINTOSC
Internal
Oscillator
Preliminary
8.5.4
The Low-Frequency Internal Oscillator (LFINTOSC) is
an uncalibrated 31 kHz internal clock source.
The output of the LFINTOSC connects to a postscaler
and multiplexer (see Figure 8-1). Select 31 kHz, via
software, using the IRCF<2:0> bits of the OSCCON
register. See Section 8.5.7 “Frequency Select Bits
(IRCF)” for more information. The LFINTOSC is also the
frequency for the Power-up Timer (PWRT), Watchdog
Timer (WDT) and Fail-Safe Clock Monitor (FSCM).
The LFINTOSC is enabled by selecting 31 kHz
(IRCF<3:0> bits of the OSCCON register = 000) as the
system clock source (SCS bits of the OSCCON
register = 1x), or when any of the following are
enabled:
• Configure the IRCF<3:0> bits for the desired LF
• FOSC<2:0> = 100, or
• Set the System Clock Source (SCS) bits of the
Peripherals that use the LFINTOSC are:
• LCD
• Power-up Timer (PWRT)
• Watchdog Timer (WDT)
• Fail-Safe Clock Monitor (FSCM)
The Low Frequency Internal Oscillator Ready bit
(LFIOFR) of the OSCSTAT register indicates when the
LFINTOSC is running and can be utilized.
frequency (see Register 8-1), and
OSCCON register to ‘1x’
LFINTOSC
© 2008 Microchip Technology Inc.

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