PIC16F1937-I/P Microchip Technology, PIC16F1937-I/P Datasheet - Page 148

• Manufacturer Part Number: PIC16F1937-I/P
• Description: IC PIC MCU FLASH 512KX14 40-PDIP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F1937-I/P

• Program Memory Type: FLASH
• Program Memory Size: 14KB (8K x 14)
• Package / Case: 40-DIP (0.600", 15.24mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 32MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 36
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: EUSART/MI2C/SPI
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 14-ch x 10-bit
• A/d Bit Size: 10 bit
• A/d Channels Available: 14
• Height: 4.95 mm
• Length: 53.21 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.8 V
• Width: 14.73 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC16F193X/LF193X
12.3
A selectable amount of separation voltage can be
added to the input pins of each comparator to provide
a hysteresis function to the overall operation.
These hysteresis levels change as a function of the
comparator’s Speed/Power mode selection.
Table 12-2 shows the hysteresis levels.
TABLE 12-2:
These levels are approximate.
See Section 28.0 “Electrical Specifications” for
more information.
12.4
The output resulting from a comparator operation can
be used as a source for gate control of Timer1. See
Section 16.6 “Timer1 Gate” for more information.
This feature is useful for timing the duration or interval
of an analog event.
It is recommended that the comparator output be syn-
chronized to Timer1. This ensures that Timer1 does not
increment while a change in the comparator is occur-
ring.
12.4.1
The output from either comparator, C1 or C2, can be
synchronized with Timer1 by setting the CxSYNC bit of
the CMxCON0 register.
Once enabled, the comparator output is latched on the
falling edge of the Timer1 source clock. If a prescaler is
used with Timer1, the comparator output is latched after
the prescaling function. To prevent a race condition, the
comparator output is latched on the falling edge of the
Timer1 clock source and Timer1 increments on the
rising edge of its clock source. See the Comparator
Block Diagram (Figure 12-2) and the Timer1 Block
Diagram (Figure 16-1) for more information.
12.5
An interrupt can be generated upon a change in the
output value of the comparator for each comparator, a
rising edge detector and a Falling edge detector are
present.
When either edge detector is triggered and its associ-
ated enable bit is set (CxINTP and/or CxINTN bits of
the CMxCON1 register), the Corresponding Interrupt
Flag bit (CxIF bit of the PIR2 register) will be set.
DS41364A-page 146
CxSP
0
1
Comparator Hysteresis
Timer1 Gate Operation
Comparator Interrupt
COMPARATOR OUTPUT
SYNCHRONIZATION
CxHYS Enabled
HYSTERESIS LEVELS
± 20mV
± 3mV
CxHYS Disabled
<< ± 1mV
± 3mV
Preliminary
To enable the interrupt, you must set the following bits:
• CxON, CxPOL and CxSP bits of the CMxCON0
• CxIE bit of the PIE2 register
• CxINTP bit of the CMxCON1 register (for a rising
• CxINTN bit of the CMxCON1 register (for a falling
• PEIE and GIE bits of the INTCON register
The associated interrupt flag bit, CxIF bit of the PIR2
register, must be cleared in software. If another edge is
detected while this flag is being cleared, the flag will still
be set at the end of the sequence.
12.6
Configuring the CxPCH<1:0> bits of the CMxCON1
register directs an internal voltage reference or an
analog pin to the non-inverting input of the comparator:
• CxIN+ analog pin
• DAC
• FVR (Fixed Voltage Reference)
• AV
See Section 14.0 “Fixed Voltage Reference” for
more information on the fixed voltage reference
module.
See
(ADC) Module” for more information on the CV
input signal.
Any time the comparator is disabled (CxON = 0), all
comparator inputs are disabled.
12.7
The CxNCH<1:0> bits of the CMxCON0 register direct
one of four analog pins to the comparator inverting
input.
register
edge detection)
edge detection)
Note:
Note:
SS
Section 11.0
(Analog Ground)
Comparator Positive Input
Selection
Comparator Negative Input
Selection
Although a comparator is disabled, an
interrupt can be generated by changing
the output polarity with the CxPOL bit of
the CMxCON0 register, or by switching the
comparator on or off with the CxON bit of
the CMxCON0 register.
To use CxIN+ and CxINx- pins as analog
input, the appropriate bits must be set in
the ANSEL register and the corresponding
TRIS bits must also be set to disable the
output drivers.
“Analog-to-Digital
© 2008 Microchip Technology Inc.
Converter
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