PIC16F72-I/ML Microchip Technology, PIC16F72-I/ML Datasheet - Page 133
![IC PIC MCU FLASH 2KX14 28-QFN](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC16F72-I/ML
Manufacturer Part Number
PIC16F72-I/ML
Description
IC PIC MCU FLASH 2KX14 28-QFN
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F818-ISO.pdf
(6 pages)
4.PIC16F72-ISO.pdf
(136 pages)
5.PIC16F72-ISO.pdf
(6 pages)
6.PIC16F72-ISO.pdf
(136 pages)
Specifications of PIC16F72-I/ML
Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI
Number Of I /o
22
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Controller Family/series
PIC16F
No. Of I/o's
22
Ram Memory Size
128Byte
Cpu Speed
20MHz
No. Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28QFN4 - SOCKET TRANS ICE 28QFN W/CABLEAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
PIC16F72-I/MLR
PIC16F72-I/MLR
PIC16F72-I/MLR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F818-ISO PDF datasheet #3
- PIC16F72-ISO PDF datasheet #4
- PIC16F72-ISO PDF datasheet #5
- PIC16F72-ISO PDF datasheet #6
- Current page: 133 of 688
- Download datasheet (3Mb)
8.5
1997 Microchip Technology Inc.
Context Saving During Interrupts
During an interrupt, only the return PC value is saved on the stack. Typically, users may wish to
save key registers during an interrupt e.g. W register and STATUS register. This has to be imple-
mented in software.
The action of saving information is commonly referred to as “PUSHing,” while the action of restor-
ing the information before the return is commonly referred to as “POPing.” These (PUSH, POP)
are not instruction mnemonics, but are conceptual actions. This action can be implemented by a
sequence of instructions. For ease of code transportability, these code segments can be made
into MACROs (see MPASM Assembler User’s Guide for details on creating macros).
Example 8-1
(such as the PIC16C77). The user register, W_TEMP, must be defined across all banks and must
be defined at the same offset from the bank base address (i.e., W_TEMP is defined at 0x70 -
0x7F in Bank0). The user register, STATUS_TEMP, must be defined in Bank0, in this example
STATUS_TEMP is also in Bank0.
The steps of
1.
2.
3.
4.
5.
If additional locations need to be saved before executing the Interrupt Service Routine (ISR)
code, they should be saved after the STATUS register is saved (step 2), and restored before the
STATUS register is restored (step 4).
Example 8-1: Saving the STATUS and W Registers in RAM
Stores the W register regardless of current bank.
Stores the STATUS register in Bank0.
Executes the Interrupt Service Routine (ISR) code.
Restores the STATUS (and bank select bit register).
Restores the W register.
MOVWF
SWAPF
MOVWF
:
: (Interrupt Service Routine (ISR) )
:
SWAPF
MOVWF
SWAPF
SWAPF
Example
stores and restores the STATUS and W registers for devices with common RAM
(for Devices with Common RAM)
W_TEMP
STATUS,W
STATUS_TEMP
STATUS_TEMP,W
STATUS
W_TEMP,F
W_TEMP,W
8-1:
; Copy W to a Temporary Register
;
; Swap STATUS nibbles and place
;
; Save STATUS to a Temporary register
;
; Swap original STATUS register value
;
; Restore STATUS register from
;
; Swap W_Temp nibbles and return
;
; Swap W_Temp to W to restore original
;
regardless of current bank
into W register
in Bank0
into W (restores original bank)
W register
value to W_Temp
W value without affecting STATUS
Section 8. Interrupts
DS31008A-page 8-11
8
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