PIC16F72-I/ML Microchip Technology, PIC16F72-I/ML Datasheet - Page 210

• Manufacturer Part Number: PIC16F72-I/ML
• Description: IC PIC MCU FLASH 2KX14 28-QFN
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F72-I/ML

• Core Size: 8-Bit
• Program Memory Size: 3.5KB (2K x 14)
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: I²C, SPI
• Number Of I /o: 22
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 5x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Controller Family/series: PIC16F
• No. Of I/o's: 22
• Ram Memory Size: 128Byte
• Cpu Speed: 20MHz
• No. Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT28QFN4 - SOCKET TRANS ICE 28QFN W/CABLEAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: PIC16F72-I/MLR; PIC16F72-I/MLR

PICmicro MID-RANGE MCU FAMILY
14.5
DS31014A-page 14-8
PWM Mode
In Pulse Width Modulation (PWM) mode, the CCPx pin produces up to a 10-bit resolution PWM
output. Since the CCPx pin is multiplexed with the PORT data latch, the corresponding TRIS bit
must be cleared to make the CCPx pin an output.
Figure 14-3
For a step by step procedure on how to set up the CCP module for PWM operation, see Subsec-
tion
Figure 14-3: Simplified PWM Block Diagram
A PWM output
cycle). The frequency of the PWM is the inverse of the period (1/period).
Figure 14-4: PWM Output
Note:
14.5.3 “Set-up for PWM Operation.”
Note 1:
Timer2 Module
CCP Module
Clearing the CCPxCON register will force the CCPx PWM output latch to the default
low level. This is not the port I/O data latch.
shows a simplified block diagram of the CCP module in PWM mode.
(Figure
8-bit timer is concatenated with 2-bit internal Q clock or 2 bits of the prescaler to
create 10-bit time-base.
CCPRxH (Slave)
(DCxB9:DCxB2)
Comparator
CCPRxL
14-4) has a time-base (period) and a time that the output stays high (duty
Duty cycle registers
PR2
TMR2
Comparator
8
8
10
TMR2 = PR2 + 1, TMR2 forced to 0h
10
10
Duty Cycle =
DCxB9:DCxB0
(Note 1)
Period = PR2 + 1
Clear Timer, CCPx pin
and latch the Duty Cycle
TMR2 = Duty Cycle
CCPxCON<5:4>
(DCxB1:DCxB0)
TMR2 = PR2 + 1, TMR2 forced to 0h
R
S
Q
TRIS<y>
1997 Microchip Technology Inc.
CCPx