PIC16F72-I/ML Microchip Technology, PIC16F72-I/ML Datasheet - Page 38
![IC PIC MCU FLASH 2KX14 28-QFN](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC16F72-I/ML
Manufacturer Part Number
PIC16F72-I/ML
Description
IC PIC MCU FLASH 2KX14 28-QFN
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F818-ISO.pdf
(6 pages)
4.PIC16F72-ISO.pdf
(136 pages)
5.PIC16F72-ISO.pdf
(6 pages)
6.PIC16F72-ISO.pdf
(136 pages)
Specifications of PIC16F72-I/ML
Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI
Number Of I /o
22
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Controller Family/series
PIC16F
No. Of I/o's
22
Ram Memory Size
128Byte
Cpu Speed
20MHz
No. Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28QFN4 - SOCKET TRANS ICE 28QFN W/CABLEAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
PIC16F72-I/MLR
PIC16F72-I/MLR
PIC16F72-I/MLR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
PIC16F72
7.3
To read a program memory location, the user must
write two bytes of the address to the PMADRL and
PMADRH registers and then set control bit, RD
(PMCON1<0>). Once the read control bit is set, the
program memory FLASH controller will use the second
instruction cycle after to read the data. This causes the
second instruction immediately following the “BSF
PMCON1,RD” instruction to be ignored. The data is
available in the very next cycle in the PMDATL and
PMDATH registers; therefore, it can be read as two
bytes in the following instructions. PMDATL and
PMDATH registers will hold this value until another
read, or until it is written to by the user (during a write
operation).
EXAMPLE 7-1:
TABLE 7-1:
DS39597C-page 36
10Dh
10Fh
10Ch
10Eh
18Ch
Legend: x = unknown, u = unchanged, r = reserved, - = unimplemented, read as '0'.
Note 1: This bit always reads as a ‘1’.
Address
BANKSEL PMADRH
MOVLW
MOVWF
MOVLW
MOVWF
BANKSEL PMCON1
BSF
NOP
NOP
BANKSEL PMDATL
MOVF
MOVF
Reading the FLASH Program
Memory
Shaded cells are not used during FLASH access.
PMADRL
PMADRH
PMDATL
PMDATH
PMCON1
Name
MS_PROG_EE_ADDR ;
PMADRH
LS_PROG_EE_ADDR ;
PMADRL
PMCON1, RD
PMDATL, W
PMDATH, W
REGISTERS ASSOCIATED WITH PROGRAM FLASH
FLASH PROGRAM READ
Address Register Low Byte
Data Register Low Byte
Bit 7
—
—
—
(1)
Bit 6
—
—
—
; Select Bank for PMADRH
; MS Byte of Program Address to read
; Select Bank for PMCON1
; memory is read in second cycle after BSF PMCON1,RD
; W = MS Byte of Program PMDATL
; LS Byte of Program Address to read
; EE Read
;
; Any instructions here are ignored as program
;
; First instruction after BSF PMCON1,RD executes normally
; Select Bank for PMDATL
; W = LS Byte of Program PMDATL
Data Register High Byte
Bit 5
—
—
Address Register High Byte
Bit 4
—
Bit 3
—
7.4
The FLASH program memory control can read any-
where within the program memory, whether or not the
program memory is code protected.
This does not compromise the code, because there is
no way to rewrite a portion of the program memory, or
leave contents of a program memory read in a register
while changing modes.
Bit 2
—
Operation During Code Protect
Bit 1
—
Bit 0
RD
© 2007 Microchip Technology Inc.
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
1--- ---0 1--- ---0
POR, BOR
Value on
Value on
RESETS
all other