PIC16LF1939-I/P Microchip Technology, PIC16LF1939-I/P Datasheet - Page 107
![IC MCU 8BIT FLASH 40-DIP](/photos/19/0/190060/4243276_sml.jpg)
PIC16LF1939-I/P
Manufacturer Part Number
PIC16LF1939-I/P
Description
IC MCU 8BIT FLASH 40-DIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Specifications of PIC16LF1939-I/P
Core Size
8-Bit
Program Memory Size
28KB (16K x 14)
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
36
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Controller Family/series
PIC16LF
Eeprom Memory Size
256Byte
Ram Memory Size
1024Byte
Cpu Speed
32MHz
No. Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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8.0
The PIC16F193X has an internal Low Dropout
Regulator (LDO) which provides operation above 3.6V.
The LDO regulates a voltage for the internal device
logic while permitting the V
at a higher voltage. There is no user enable/disable
control available for the LDO, it is always active. The
PIC16LF193X operates at a maximum V
does not incorporate an LDO.
A device I/O pin may be configured as the LDO voltage
output, identified as the V
required, an external low-ESR capacitor may be con-
nected to the V
The VCAPEN<1:0> bits of Configuration Word 2 deter-
mines which pin is assigned as the V
Table 8-1.
TABLE 8-1:
TABLE 8-2:
2009 Microchip Technology Inc.
CONFIG2
Legend:
Note 1:
Name
VCAPEN<1:0>
LOW DROPOUT (LDO)
VOLTAGE REGULATOR
— = unimplemented locations read as ‘0’. Shaded cells are not used by LDO.
PIC16F193X only.
00
01
10
11
Bits
13:8
7:0
CAP
VCAPEN<1:0> SELECT BITS
SUMMARY OF CONFIGURATION WORD WITH LDO
pin for additional regulator stability.
Bit -/7
—
—
DD
CAP
and I/O pins to operate
Bit -/6
—
—
pin. Although not
No Vcap
CAP
RA0
RA5
RA6
Pin
DD
VCAPEN1
pin. Refer to
Bit 13/5
of 3.6V and
LVP
(1)
Preliminary
VCAPEN0
Bit 12/4
DEBUG
(1)
On power-up, the external capacitor will load the LDO
voltage regulator. To prevent erroneous operation, the
device is held in Reset while a constant current source
charges the external capacitor. After the cap is fully
charged, the device is released from Reset. For more
information on recommended capacitor values and the
constant current rate, refer to the LDO Regulator
Characteristics Table in Section 29.0 “Electrical
Specifications”.
PIC16F193X/LF193X
Bit 11/3
—
—
Bit 10/2
BORV
—
STVREN
Bit 9/1
WRT1
DS41364D-page 107
PLLEN
Bit 8/0
WRT0
Register
on Page
66
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