PIC18LF14K50-I/P Microchip Technology, PIC18LF14K50-I/P Datasheet - Page 415
![IC PIC MCU FLASH 16KX10 20-PDIP](/photos/12/13/121303/150-20-dip_sml.jpg)
PIC18LF14K50-I/P
Manufacturer Part Number
PIC18LF14K50-I/P
Description
IC PIC MCU FLASH 16KX10 20-PDIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18F13K50-ISS.pdf
(420 pages)
2.PIC18F13K50-ISS.pdf
(40 pages)
3.PIC18F13K50-ISS.pdf
(10 pages)
4.PIC18F13K50-ISS.pdf
(2 pages)
5.PIC18F14K50-IP.pdf
(422 pages)
Specifications of PIC18LF14K50-I/P
Program Memory Type
FLASH
Program Memory Size
16KB (8K x 16)
Package / Case
20-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
14
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
EUSART/I2C/MSSP/SPI/USB
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
15
Number Of Timers
4
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM164127, DV164126
Minimum Operating Temperature
- 40 C
On-chip Adc
11-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18LF14K50-I/P
Manufacturer:
Microchip
Quantity:
450
- PIC18F13K50-ISS PDF datasheet
- PIC18F13K50-ISS PDF datasheet #2
- PIC18F13K50-ISS PDF datasheet #3
- PIC18F13K50-ISS PDF datasheet #4
- PIC18F14K50-IP PDF datasheet #5
- Current page: 415 of 420
- Download datasheet (4Mb)
Top-of-Stack Access .......................................................... 30
TRISA Register .................................................................. 85
TRISB Register ............................................................ 90, 94
TSTFSZ ........................................................................... 349
Two-Speed Start-up ......................................................... 291
Two-Word Instructions
TXREG ............................................................................. 183
TXSTA Register ............................................................... 190
U
Universal Serial Bus
USART
USB Module Electrical Specifications .............................. 376
USB RAM
2010 Microchip Technology Inc.
I2C Bus Start/Stop Bits ............................................ 394
SPI Mode ................................................................. 393
Example Cases .......................................................... 34
BRGH Bit ................................................................. 193
Address Register (UADDR) ..................................... 258
Associated Registers ............................................... 274
Buffer Descriptor Table ............................................ 259
Buffer Descriptors .................................................... 259
Class Specifications and Drivers ............................. 276
Descriptors ............................................................... 276
Endpoint Control ...................................................... 257
Enumeration ............................................................. 276
External Pull-up Resistors ........................................ 255
Eye Pattern Test Enable .......................................... 255
Firmware and Drivers ............................................... 274
Frame Number Registers ......................................... 258
Frames ..................................................................... 275
Internal Pull-up Resistors ......................................... 255
Internal Transceiver ................................................. 253
Interrupts .................................................................. 265
Layered Framework ................................................. 275
Oscillator Requirements ........................................... 274
Overview .......................................................... 251, 275
Ping-Pong Buffer Configuration ............................... 255
Power ....................................................................... 275
Power Modes ........................................................... 271
RAM ......................................................................... 258
Speed ....................................................................... 276
Status and Control ................................................... 252
Transfer Types ......................................................... 275
UFRMH:UFRML Registers ...................................... 258
Synchronous Master Mode
Address Validation ........................................... 262
Assignment in Different Buffering Modes ........ 264
BDnSTAT Register (CPU Mode) ..................... 260
BDnSTAT Register (SIE Mode) ....................... 262
Byte Count ....................................................... 262
Example ........................................................... 259
Memory Map .................................................... 263
Ownership ........................................................ 259
Ping-Pong Buffering ......................................... 263
Register Summary ........................................... 264
Status and Configuration ................................. 259
and USB Transactions ..................................... 265
Bus Power Only ............................................... 271
Dual Power with Self-Power Dominance ......... 272
Self-Power Only ............................................... 271
Memory Map .................................................... 258
Requirements, Synchronous Receive ............. 390
Requirements, Synchronous Transmission ..... 390
Timing Diagram, Synchronous Receive .......... 390
Timing Diagram, Synchronous Transmission .. 390
Preliminary
USB. See Universal Serial Bus.
V
Voltage Reference (VR)
Voltage Reference. See Comparator Voltage Reference
Voltage References
V
W
Wake-up on Break ........................................................... 198
Watchdog Timer (WDT) ........................................... 291, 302
WCOL ...................................................... 169, 170, 171, 174
WCOL Status Flag ................................... 169, 170, 171, 174
WDTCON Register .......................................................... 303
WPUA Register .................................................................. 86
WPUB Register .................................................................. 91
WWW Address ................................................................ 417
WWW, On-Line Support ...................................................... 7
X
XORLW ........................................................................... 349
XORWF ........................................................................... 350
REF
Serial Interface Engine (SIE) ..................................... 35
Specifications .......................................................... 389
(CV
Fixed Voltage Reference (FVR) .............................. 246
VR Stabilization ....................................................... 246
. S
Associated Registers ............................................... 303
Control Register ....................................................... 303
Programming Considerations .................................. 302
Specifications .......................................................... 385
EE
REF
ADC Reference Voltage
PIC18F/LF1XK50
)
DS41350E-page 415
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