PIC18F26K20-E/SS Microchip Technology, PIC18F26K20-E/SS Datasheet - Page 362
![IC PIC MCU FLASH 32KX16 28SSOP](/photos/6/81/68119/150-28-ssop_sml.jpg)
PIC18F26K20-E/SS
Manufacturer Part Number
PIC18F26K20-E/SS
Description
IC PIC MCU FLASH 32KX16 28SSOP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18F25K20T-ISS.pdf
(42 pages)
2.PIC18F25K20T-ISS.pdf
(456 pages)
3.PIC18F26K20-ISS.pdf
(6 pages)
4.PIC18F26K20-ISS.pdf
(10 pages)
5.PIC18F26K20-EML.pdf
(430 pages)
Specifications of PIC18F26K20-E/SS
Core Size
8-Bit
Program Memory Size
64KB (32K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SSOP
Controller Family/series
PIC18
No. Of I/o's
25
Eeprom Memory Size
1024Byte
Ram Memory Size
3.84375KB
Cpu Speed
64MHz
No. Of Timers
4
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3936 B
Interface Type
CCP, ECCP, EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 11 Channel
Package
28SSOP
Device Core
PIC
Family Name
PIC18
Maximum Speed
64 MHz
Operating Supply Voltage
2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPAC164307 - MODULE SKT FOR PM3 28SSOP
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F26K20-E/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC18F25K20T-ISS PDF datasheet
- PIC18F25K20T-ISS PDF datasheet #2
- PIC18F26K20-ISS PDF datasheet #3
- PIC18F26K20-ISS PDF datasheet #4
- PIC18F26K20-EML PDF datasheet #5
- Current page: 362 of 456
- Download datasheet (4Mb)
PIC18F2XK20/4XK20
24.2.3
In addition to eight new commands in the extended set,
enabling the extended instruction set also enables
Indexed Literal Offset Addressing mode (Section 5.5.1
“Indexed Addressing with Literal Offset”). This has
a significant impact on the way that many commands of
the standard PIC18 instruction set are interpreted.
When the extended set is disabled, addresses
embedded in opcodes are treated as literal memory
locations: either as a location in the Access Bank (‘a’ =
0), or in a GPR bank designated by the BSR (‘a’ = 1).
When the extended instruction set is enabled and ‘a’ =
0, however, a file register argument of 5Fh or less is
interpreted as an offset from the pointer value in FSR2
and not as a literal address. For practical purposes, this
means that all instructions that use the Access RAM bit
as an argument – that is, all byte-oriented and bit-
oriented instructions, or almost half of the core PIC18
instructions – may behave differently when the
extended instruction set is enabled.
When the content of FSR2 is 00h, the boundaries of the
Access RAM are essentially remapped to their original
values. This may be useful in creating backward
compatible code. If this technique is used, it may be
necessary to save the value of FSR2 and restore it
when moving back and forth between C and assembly
routines in order to preserve the Stack Pointer. Users
must also keep in mind the syntax requirements of the
extended
“Extended Instruction Syntax with Standard PIC18
Commands”).
Although the Indexed Literal Offset Addressing mode
can be very useful for dynamic stack and pointer
manipulation, it can also be very annoying if a simple
arithmetic operation is carried out on the wrong
register. Users who are accustomed to the PIC18
programming must keep in mind that, when the
extended instruction set is enabled, register addresses
of 5Fh or less are used for Indexed Literal Offset
Addressing.
Representative examples of typical byte-oriented and
bit-oriented instructions in the Indexed Literal Offset
Addressing mode are provided on the following page to
show how execution is affected. The operand condi-
tions shown in the examples are applicable to all
instructions of these types.
DS41303G-page 362
Note:
Enabling
extension may cause legacy applications
to behave erratically or fail entirely.
BYTE-ORIENTED AND
BIT-ORIENTED INSTRUCTIONS IN
INDEXED LITERAL OFFSET MODE
instruction
the
set
PIC18
(see
Section 24.2.3.1
instruction
set
24.2.3.1
When the extended instruction set is enabled, the file
register argument, ‘f’, in the standard byte-oriented and
bit-oriented commands is replaced with the literal offset
value, ‘k’. As already noted, this occurs only when ‘f’ is
less than or equal to 5Fh. When an offset value is used,
it must be indicated by square brackets (“[ ]”). As with
the extended instructions, the use of brackets indicates
to the compiler that the value is to be interpreted as an
index or an offset. Omitting the brackets, or using a
value greater than 5Fh within brackets, will generate an
error in the MPASM Assembler.
If the index argument is properly bracketed for Indexed
Literal Offset Addressing, the Access RAM argument is
never specified; it will automatically be assumed to be
‘0’. This is in contrast to standard operation (extended
instruction set disabled) when ‘a’ is set on the basis of
the target address. Declaring the Access RAM bit in
this mode will also generate an error in the MPASM
Assembler.
The destination argument, ‘d’, functions as before.
In the latest versions of the MPASM™ assembler,
language support for the extended instruction set must
be explicitly invoked. This is done with either the
command line option, /y, or the PE directive in the
source listing.
24.2.4
It is important to note that the extensions to the instruc-
tion set may not be beneficial to all users. In particular,
users who are not writing code that uses a software
stack may not benefit from using the extensions to the
instruction set.
Additionally, the Indexed Literal Offset Addressing
mode may create issues with legacy applications
written to the PIC18 assembler. This is because
instructions in the legacy code may attempt to address
registers in the Access Bank below 5Fh. Since these
addresses are interpreted as literal offsets to FSR2
when the instruction set extension is enabled, the
application may read or write to the wrong data
addresses.
When porting an application to the PIC18F2XK20/
4XK20, it is very important to consider the type of code.
A large, re-entrant application that is written in ‘C’ and
would benefit from efficient compilation will do well
when using the instruction set extensions. Legacy
applications that heavily use the Access Bank will most
likely not benefit from using the extended instruction
set.
CONSIDERATIONS WHEN
ENABLING THE EXTENDED
INSTRUCTION SET
Extended Instruction Syntax with
Standard PIC18 Commands
2010 Microchip Technology Inc.
Related parts for PIC18F26K20-E/SS
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![TC1014-2.7VCT](/images/manufacturer_photos/0/4/440/microchip_technology_inc__tmb.jpg)
Part Number:
Description:
Manufacturer:
Microchip Technology Inc.
Datasheet:
![TC1014-5.0VCT](/images/manufacturer_photos/0/4/440/microchip_technology_inc__tmb.jpg)
Part Number:
Description:
Manufacturer:
Microchip Technology Inc.
Datasheet:
![TC1055-2.5VCT](/images/manufacturer_photos/0/4/440/microchip_technology_inc__tmb.jpg)
Part Number:
Description:
Manufacturer:
Microchip Technology Inc.
Datasheet:
![TC1055-2.7VCT](/images/manufacturer_photos/0/4/440/microchip_technology_inc__tmb.jpg)
Part Number:
Description:
Manufacturer:
Microchip Technology Inc.
Datasheet:
![TC1055-2.8VCT](/images/manufacturer_photos/0/4/440/microchip_technology_inc__tmb.jpg)
Part Number:
Description:
Manufacturer:
Microchip Technology Inc.
Datasheet:
![TC1055-4.0VCT](/images/manufacturer_photos/0/4/440/microchip_technology_inc__tmb.jpg)
Part Number:
Description:
Manufacturer:
Microchip Technology Inc.
Datasheet:
![TC1186-2.5VCT](/images/manufacturer_photos/0/4/440/microchip_technology_inc__tmb.jpg)
Part Number:
Description:
Manufacturer:
Microchip Technology Inc.
Datasheet:
![TC1186-2.85VCT](/images/manufacturer_photos/0/4/440/microchip_technology_inc__tmb.jpg)
Part Number:
Description:
Manufacturer:
Microchip Technology Inc.
Datasheet: