PIC18F44K20-E/P Microchip Technology, PIC18F44K20-E/P Datasheet - Page 7

• Manufacturer Part Number: PIC18F44K20-E/P
• Description: IC PIC MCU FLASH 8KX16 40-DIP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F44K20-E/P

• Core Size: 8-Bit
• Program Memory Size: 16KB (8K x 16)
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Controller Family/series: PIC18
• No. Of I/o's: 36
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 768Byte
• Cpu Speed: 64MHz
• No. Of Timers: 4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPDM164124 - KIT STARTER FOR PIC18F4XK20
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

19. Module: POR
20. Module: POR
21. Module: Clocks
 2010 Microchip Technology Inc.
The POR may release around 0.8V (below the
POR rearm voltage of 1.2V, nominal) when V
rises from below 0.60V (when BOR is not enabled)
or 0.33V (when BOR is enabled).
Work around
Use Power-up Timer when operating with the EC,
EXTRC or HFINTOSC oscillator modes. Ensure
that V
time.
Affected Silicon Revisions
The part may hang in the Reset state when V
rises to the operating range at a rate faster than
7500V per second. Recovery from the hung state
is possible only by first lowering V
followed by raising V
Work around
Slow V
between the voltage supply and the V
increasing the V
bypassing should remain on the pin side of the
series resistor.
Affected Silicon Revisions
EC mode operation is limited to a maximum of
48 MHz (Rev. A4 and A7 only).
Work around
Divide external clock by 4 and use HS-PLL Clock
mode for external clocking above 48 MHz.
Affected Silicon Revisions
X
X
X
DD
DD
X
X
X
rise time is less than the Power-up Timer
rise time by adding series resistance
X
X
DD
DD
X
X
bypass capacitance. V
to the operating range.
PIC18F24K20/25K20/44K20/45K20
DD
to below 0.3V,
DD
pin and
DD
DD
DD
22. Module: Comparators
23. Module: Data EEPROM Memory
24. Module: Program Flash Memory
When the CxON bit is clear, the output from the
comparator will be properly forced to zero, but the
CxPOL bit will improperly have no effect on the
CxOUT bit. This prevents presetting the compara-
tor change-on-interrupt mismatch latches as
described in the data sheet.
Work around
Configure one of the unused comparator input
channels as a digital output. Use that digital output
to manipulate the comparator output to the desired
CxOUT non-interrupt level. When the comparator
is then set to the desired inputs, the mismatch
latches will be preset to the non-interrupt level and
the CxIF flag can then be cleared.
Affected Silicon Revisions
The write/erase endurance of Data EE Memory is
limited to 10K cycles.
Work around
Use error correction method that stores data in
multiple locations.
Affected Silicon Revisions
The write/erase endurance of the PFM is limited to
1K cycles when V
degrades when V
Work around
For data tables in program Flash memory use
error correction method that stores data in multiple
locations.
Affected Silicon Revisions
X
X
X
X
X
X
X
X
X
DD
DD
is below 3V.
X
X
X
is above 3V. Endurance
X
X
DS80425G-page 7
X
X
X
X