DSPIC33FJ06GS101-I/SO Microchip Technology, DSPIC33FJ06GS101-I/SO Datasheet - Page 13

• Manufacturer Part Number: DSPIC33FJ06GS101-I/SO
• Description: IC DSPIC MCU/DSP 6K 18-SOIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ06GS101-I/SO

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 13
• Program Memory Size: 6KB (6K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 18-SOIC (7.5mm Width)
• Core Frequency: 40MHz
• Core Supply Voltage: 3.3V
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 13
• Flash Memory Size: 6KB
• Supply Voltage Range: 3V To 3.6V
• Package: 18SOIC W
• Device Core: dsPIC
• Family Name: dsPIC33
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 13
• Interface Type: I2C/SPI/UART
• On-chip Adc: 6-chx10-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

33. Module: Reserved
34. Module: PWM
© 2010 Microchip Technology Inc.
The issue in the previous version of the document
has been removed.
The High-Speed PWM provides a feature to
update the PWM duty cycle at any time during the
PWM period. The new duty cycle should take
effect:
• On the next PWM period when immediate duty
• On the same PWM period when immediate
However, when the immediate duty cycle updates
are disabled and the duty cycle update coincides
with a PWM period roll-over, the PWM output may
be corrupted and exhibit a 100% duty cycle for one
PWM period. The new duty cycle value will take
effect on the next PWM period.
Work around
Enable
configuring PWMCONx<IUE> = 1.
Affected Silicon Revisions
A2
cycle updates are disabled
(PWMCONx<IUE> = 0).
duty cycle updates are enabled
(PWMCONx<IUE> = 1).
X
A3
X
immediate
A4
X
duty
cycle
updates
by
35. Module: JTAG
In JTAG mode, the TMS pin will not have an active
pull-up as required by the JTAG specification.
Instead, the pull-up function will be enabled on the
TCK pin.
Work around
An external pull-up resistor can be connected to
the TMS pin to ensure that the signal does not
enter a tri-state condition when in JTAG mode.
There is no work around for the wrongly enabled
pull-up function on the TCK pin.
Affected Silicon Revisions
A2
Note:
X
A3
X
This issue is only present in the
dsPIC33FJ06GS101 device.
A4
X
DS80439H-page 13