DSPIC33FJ06GS101-I/SO Microchip Technology, DSPIC33FJ06GS101-I/SO Datasheet - Page 8

• Manufacturer Part Number: DSPIC33FJ06GS101-I/SO
• Description: IC DSPIC MCU/DSP 6K 18-SOIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ06GS101-I/SO

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 13
• Program Memory Size: 6KB (6K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 18-SOIC (7.5mm Width)
• Core Frequency: 40MHz
• Core Supply Voltage: 3.3V
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 13
• Flash Memory Size: 6KB
• Supply Voltage Range: 3V To 3.6V
• Package: 18SOIC W
• Device Core: dsPIC
• Family Name: dsPIC33
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 13
• Interface Type: I2C/SPI/UART
• On-chip Adc: 6-chx10-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

15. Module: UART
16. Module: I
EXAMPLE 1:
DS80439H-page 8
TRGCON1bits.DTM = 1;
TRIG1 = 1224;
STRIG1 = 1232;
ADCPC2bits.TRGSRC5 = 0x4; /* PWM1 primary trigger selected as ADC trigger source for ADCP5*/
When the UART is configured for IR interface
operations (UxMODE<9:8> = 11), the 16x baud
clock signal on the BCLK pin is present only when
the module is transmitting. The pin is idle at all
other times.
Work around
Configure one of the output compare modules to
generate the required baud clock signal when the
UART is receiving data or in an Idle state.
Affected Silicon Revisions
If there are two I
them is acting as the Master receiver and the other
as the Slave transmitter. If both devices are
configured for 10-bit addressing mode, and have
the same value in the A10 and A9 bits of their
addresses, then when the Slave select address is
sent from the Master, both the Master and Slave
acknowledge it. When the Master sends out the
read operation, both the Master and the Slave
enter into Read mode and both of them transmit
the data. The resultant data will be the ANDing of
the two transmissions.
Work around
In all I
A10 and A9 should be different.
Affected Silicon Revisions
A2
A2
X
X
2
C devices, the addresses as well as bits
A3
A3
X
X
2
C™
A4
A4
X
X
USING DUAL TRIGGER MODE
2
C devices on the bus, one of
/* Dual trigger mode (DTM) and STRIG used in combination to generate */
/* ADCPx triggers */
/* Configure desired trigger */
/* STRIG1 should be configured for TRIG1 + 8 */
17. Module: PWM
When the primary or secondary PWMx generator
is selected as a trigger source for ADC convert
pairs 3, 4, 5 or 6 and the PWM module is running
at the maximum speed, the PWM module may fail
to trigger a conversion on these ADC pairs.
Work arounds
Work around 1:
Configure the PWM module to trigger the ADC
module per the following steps (see
the code used in this work around):
1. Enable the dual trigger mode bit (DTM) in the
2. Configure the TRIGx register to the desired
3. Configure the STRIGx register to TRIGx + 0x8.
4. Select the PWMx primary trigger as the ADC
If the PWM channel is configured for independent
output mode and both channels are operating on
the same time base, the phase difference between
the two channels must be considered when setting
the STRIGx register. This work around will not
work for True Independent Time Base mode.
With this work around, the PWMx secondary
trigger should not be selected as the trigger source
for the ADC convert pair.
Work around 2:
Configure the PWM Input Clock Prescaler bits
(PCLKDIV) for divide by 2 or higher.
Work around 3:
Utilize other available trigger sources, such as
software or timer triggers, to initiate conversion on
the affected ADC convert pairs.
Affected Silicon Revisions
A2
X
TRGCONx register.
trigger point.
trigger source for conversion.
A3
A4
© 2010 Microchip Technology Inc.
Example 1
for