ATMEGA8L-8MU Atmel, ATMEGA8L-8MU Datasheet - Page 96
![IC AVR MCU 8K 8MHZ 3V 32-QFN](/photos/12/13/121317/atmega8l-8mu_sml.jpg)
ATMEGA8L-8MU
Manufacturer Part Number
ATMEGA8L-8MU
Description
IC AVR MCU 8K 8MHZ 3V 32-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA8L-8MU
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Package
32MLF EP
Device Core
AVR
Family Name
ATmega
Maximum Speed
8 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
23
Interface Type
SPI/TWI/USART
On-chip Adc
8-chx10-bit
Number Of Timers
3
Controller Family/series
AVR MEGA
No. Of I/o's
23
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Cpu Speed
8MHz
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA8L-8MU
Manufacturer:
AT
Quantity:
20 000
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- Download datasheet (6Mb)
16-bit
Timer/Counter
Register
Description
Timer/Counter 1
Control Register A –
TCCR1A
96
ATmega8(L)
• Bit 7:6 – COM1A1:0: Compare Output Mode for channel A
• Bit 5:4 – COM1B1:0: Compare Output Mode for channel B
The COM1A1:0 and COM1B1:0 control the Output Compare Pins (OC1A and OC1B respec-
tively) behavior. If one or both of the COM1A1:0 bits are written to one, the OC1A output
overrides the normal port functionality of the I/O pin it is connected to. If one or both of the
COM1B1:0 bit are written to one, the OC1B output overrides the normal port functionality of the
I/O pin it is connected to. However, note that the Data Direction Register (DDR) bit correspond-
ing to the OC1A or OC1B pin must be set in order to enable the output driver.
When the OC1A or OC1B is connected to the pin, the function of the COM1x1:0 bits is depen-
dent of the WGM13:0 bits setting.
WGM13:0 bits are set to a normal or a CTC mode (non-PWM).
Table 36. Compare Output Mode, Non-PWM
Table 37
mode.
Table 37. Compare Output Mode, Fast PWM
Note:
Bit
Read/Write
Initial Value
COM1A1/
COM1A1/
COM1B1
COM1B1
0
0
1
1
0
0
1
1
1. A special case occurs when OCR1A/OCR1B equals TOP and COM1A1/COM1B1 is set. In
shows the COM1x1:0 bit functionality when the WGM13:0 bits are set to the fast PWM
this case the Compare Match is ignored, but the set or clear is done at BOTTOM. See
PWM Mode” on page 88
COM1A1
R/W
7
0
COM1A0/
COM1A0/
COM1B0
COM1B0
0
1
0
1
0
1
0
1
COM1A0
R/W
6
0
Description
Normal port operation, OC1A/OC1B disconnected.
WGM13:0 = 15: Toggle OC1A on Compare Match, OC1B
disconnected (normal port operation). For all other WGM1
settings, normal port operation, OC1A/OC1B disconnected.
Clear OC1A/OC1B on Compare Match, set OC1A/OC1B at
BOTTOM, (non-inverting mode)
Set OC1A/OC1B on Compare Match, clear OC1A/OC1B at
BOTTOM, (inverting mode)
Description
Normal port operation, OC1A/OC1B disconnected.
Toggle OC1A/OC1B on Compare Match
Clear OC1A/OC1B on Compare Match (Set output to low level)
Set OC1A/OC1B on Compare Match (Set output to high level)
COM1B1
R/W
5
0
for more details
Table 36
COM1B0
R/W
4
0
(1)
shows the COM1x1:0 bit functionality when the
FOC1A
W
3
0
FOC1B
W
2
0
WGM11
R/W
1
0
WGM10
R/W
0
0
TCCR1A
2486Z–AVR–02/11
“Fast
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