PIC16F639-I/SS Microchip Technology, PIC16F639-I/SS Datasheet - Page 142

• Manufacturer Part Number: PIC16F639-I/SS
• Description: IC MCU FLASH 2KX14 20SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F639-I/SS

• Program Memory Type: FLASH
• Program Memory Size: 3.5KB (2K x 14)
• Package / Case: 20-SSOP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, LVD, POR, WDT
• Number Of I /o: 11
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: SPI
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 2
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT20SS1-1 - SOCKET TRANSITION 20DIP 20SSOPXLT20SS-1 - SOCKET TRANSITION 18DIP 20SSOPAC162066 - HEADER INTRFC MPLAB ICD2 20PINAC164307 - MODULE SKT FOR PM3 28SSOP
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC12F635/PIC16F636/639
12.9.2
An overflow (FFh
the T0IF bit of the INTCON register. The interrupt can be
enabled/disabled by setting/clearing T0IE bit of the
INTCON register. See Section 5.0 “Timer0 Module”
for operation of the Timer0 module.
FIGURE 12-7:
DS41232D-page 140
TIMER INTERRUPT
Note 1: PIC16F636/639 only.
IOC-RA0
IOC-RA1
IOC-RA2
IOC-RA3
IOC-RA4
IOC-RA5
TMR1IE
TMR1IF
C2IF
C2IE
IOCA0
IOCA1
IOCA2
IOCA3
IOCA4
IOCA5
OSFIF
OSFIE
LVDIF
LVDIE
CRIF
CRIE
EEIF
EEIE
C1IF
C1IE
00h) in the TMR0 register will set
(1)
(1)
INTERRUPT LOGIC
RAIE
INTF
INTE
RAIF
PEIE
T0IF
T0IE
GIE
12.9.3
An input change on PORTA change sets the RAIF bit of
the
enabled/disabled by setting/clearing the RAIE bit of the
INTCON register. Plus, individual pins can be configured
through the IOCA register.
Note:
INTCON
PORTA INTERRUPT
If a change on the I/O pin should occur
when the read operation is being executed
(start of the Q2 cycle), then the RAIF
interrupt flag may not get set.
register.
Wake-up (If in Sleep mode)
© 2007 Microchip Technology Inc.
The
Interrupt to CPU
interrupt
can
be