PIC16F639-I/SS Microchip Technology, PIC16F639-I/SS Datasheet - Page 89

• Manufacturer Part Number: PIC16F639-I/SS
• Description: IC MCU FLASH 2KX14 20SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F639-I/SS

• Program Memory Type: FLASH
• Program Memory Size: 3.5KB (2K x 14)
• Package / Case: 20-SSOP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, LVD, POR, WDT
• Number Of I /o: 11
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: SPI
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 2
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT20SS1-1 - SOCKET TRANSITION 20DIP 20SSOPXLT20SS-1 - SOCKET TRANSITION 18DIP 20SSOPAC162066 - HEADER INTRFC MPLAB ICD2 20PINAC164307 - MODULE SKT FOR PM3 28SSOP
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

8.0
The Programmable Low-Voltage Detect (PLVD)
module is a power supply detector which monitors the
internal power supply. This module is typically used in
key fobs and other devices, where certain actions
need to be taken as a result of a falling battery voltage.
FIGURE 8-1:
FIGURE 8-2:
© 2007 Microchip Technology Inc.
LVDEN
V
DD
PROGRAMMABLE
LOW-VOLTAGE DETECT
(PLVD) MODULE
LVDIF
PLVD BLOCK DIAGRAM
PLVD OPERATION
V
DD
PLVD Trip Point
Set by
Hardware
8 Stages
Reference
Generator
Voltage
PIC12F635/PIC16F636/639
The PLVD module includes the following capabilities:
• Eight programmable trip points
• Interrupt on falling V
• Stable reference indication
• Operation during Sleep
A Block diagram of the PLVD module is shown in
Figure 8-1.
Analog MUX
LVDL<2:0>
8-to-1
0
1
2
6
7
Cleared by
Software
-
+
DD
det
DS41232D-page 87
LVDIF