PIC18LF44J50-I/ML Microchip Technology, PIC18LF44J50-I/ML Datasheet - Page 72
![IC PIC MCU FLASH 16K 2V 44-QFN](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC18LF44J50-I/ML
Manufacturer Part Number
PIC18LF44J50-I/ML
Description
IC PIC MCU FLASH 16K 2V 44-QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18LF24J10-ISS.pdf
(32 pages)
2.PIC18LF24J50-ISS.pdf
(554 pages)
3.PIC18LF24J50-ISS.pdf
(12 pages)
Specifications of PIC18LF44J50-I/ML
Program Memory Type
FLASH
Program Memory Size
16KB (8K x 16)
Package / Case
44-QFN
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
34
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3776 B
Interface Type
EUSART, I2C, SPI
Maximum Clock Frequency
31 KHz
Number Of Programmable I/os
22
Number Of Timers
5
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183022, DM183032, DV164136, MA180024
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 13 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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PIC18F46J50 FAMILY
5.1.1
All PIC18 devices have a total of three hard-coded
return vectors in their program memory space. The
Reset vector address is the default value to which the
program counter returns on all device Resets; it is
located at 0000h.
PIC18 devices also have two interrupt vector
addresses for handling high-priority and low-priority
interrupts. The high-priority interrupt vector is located at
0008h and the low-priority interrupt vector at 0018h.
Figure 5-2 provides their locations in relation to the
program memory map.
FIGURE 5-2:
DS39931C-page 72
Legend:
High-Priority Interrupt Vector
Low-Priority Interrupt Vector
Flash Configuration Words
Program Memory
HARD MEMORY VECTORS
Reset Vector
(Top of Memory) represents upper boundary
of on-chip program memory space (see
Figure 5-1 for device-specific values).
Shaded area represents unimplemented
memory. Areas are not shown to scale.
Read as ‘0’
On-Chip
HARD VECTOR AND
CONFIGURATION WORD
LOCATIONS FOR
PIC18F46J50 FAMILY
DEVICES
0000h
0008h
0018h
(Top of Memory-7)
(Top of Memory)
1FFFFFh
persistent configuration memory, the top four words of
5.1.2
Because PIC18F46J50 Family devices do not have
on-chip program memory are reserved for configuration
information. On Reset, the configuration information is
copied into the Configuration registers.
The Configuration Words are stored in their program
memory location in numerical order, starting with the
lower byte of CONFIG1 at the lowest address and
ending with the upper byte of CONFIG4.
Table 5-1 provides the actual addresses of the Flash
Configuration Word for devices in the PIC18F46J50
Family. Figure 5-2 displays their location in the memory
map with other memory vectors.
Additional details on the device Configuration Words
are provided in Section 26.1 “Configuration Bits”.
TABLE 5-1:
PIC18F24J50
PIC18F44J50
PIC18F25J50
PIC18F45J50
PIC18F26J50
PIC18F46J50
Device
FLASH CONFIGURATION WORDS
FLASH CONFIGURATION
WORD FOR PIC18F46J50
FAMILY DEVICES
Program
(Kbytes)
Memory
© 2009 Microchip Technology Inc.
16
32
64
FFF8h to FFFFh
3FF8h to 3FFFh
7FF8h to 7FFFh
Configuration
Addresses
Word
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