PIC18F45J50-I/PT Microchip Technology, PIC18F45J50-I/PT Datasheet - Page 359
![IC PIC MCU FLASH 32K 2V 44-TQFP](/photos/6/82/68251/c04-076_pt_sml.jpg)
PIC18F45J50-I/PT
Manufacturer Part Number
PIC18F45J50-I/PT
Description
IC PIC MCU FLASH 32K 2V 44-TQFP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18LF24J50-ISS.pdf
(554 pages)
2.PIC18LF24J50-ISS.pdf
(12 pages)
3.PIC18F26J11-ISO.pdf
(28 pages)
Specifications of PIC18F45J50-I/PT
Program Memory Type
FLASH
Program Memory Size
32KB (16K x 16)
Package / Case
44-TQFP, 44-VQFP
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
34
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
EUSART, I2C, SPI
Maximum Clock Frequency
48 MHz
Number Of Timers
5
Operating Supply Voltage
2.25 V to 2.75 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183032, MA180024, DM183022
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 13 Channel
Controller Family/series
PIC18
No. Of I/o's
22
Ram Memory Size
3776Byte
Cpu Speed
48MHz
No. Of Timers
5
Embedded Interface Type
EUSART, I2C, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F45J50-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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21.2.5
The USB Address register contains the unique USB
address that the peripheral will decode when active.
UADDR is reset to 00h when a USB Reset is received,
indicated by URSTIF, or when a Reset is received from
the microcontroller. The USB address must be written
by the microcontroller during the USB setup phase
(enumeration) as part of the Microchip USB firmware
support.
21.2.6
The Frame Number registers contain the 11-bit frame
number. The low-order byte is contained in UFRML,
while the three high-order bits are contained in
UFRMH. The register pair is updated with the current
frame number whenever a SOF token is received. For
the microcontroller, these registers are read-only. The
Frame Number registers are primarily used for
isochronous transfers. The contents of the UFRMH and
UFRML registers are only valid when the 48 MHz SIE
clock is active (i.e., contents are inaccurate when
SUSPND (UCON<1>) bit = 1).
21.3
USB data moves between the microcontroller core and
the SIE through a memory space known as the USB
RAM. This is a special dual access memory that is
mapped into the normal data memory space in Banks 0
through 14 (00h to EBFh) for a total of 3.8 Kbytes
(Figure 21-4).
Bank 4 (400h through 4FFh) is used specifically for
endpoint buffer control, while Banks 0 through 3 and
Banks 5 through 14 are available for USB data.
Depending on the type of buffering being used, all but
8 bytes of Bank 4 may also be available for use as USB
buffer space.
Although USB RAM is available to the microcontroller
as data memory, the sections that are being accessed
by the SIE should not be accessed by the
microcontroller. A semaphore mechanism is used to
determine the access to a particular buffer at any given
time. This is discussed in Section 21.4.1.1 “Buffer
Ownership”.
© 2009 Microchip Technology Inc.
USB RAM
USB FRAME NUMBER REGISTERS
USB ADDRESS REGISTER
(UADDR)
(UFRMH:UFRML)
PIC18F46J50 FAMILY
FIGURE 21-4:
(USB RAM)
Banks 0
to 14
USB Data or User Data
Buffer Descriptors,
IMPLEMENTATION OF
USB RAM IN DATA
MEMORY SPACE
Access Ram
USB Data or
USB Data or
User Data
User Data
SFRs
DS39931C-page 359
000h
05Fh
060h
3FFh
400h
4FFh
500h
EBFh
EC0h
FFFh
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