DSPIC33FJ12MC201-I/SO Microchip Technology, DSPIC33FJ12MC201-I/SO Datasheet - Page 158

• Manufacturer Part Number: DSPIC33FJ12MC201-I/SO
• Description: IC DSPIC MCU/DSP 12K 20SOIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ12MC201-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 12KB (12K x 8)
• Package / Case: 20-SOIC (7.5mm Width)
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 15
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC33F
• Core: dsPIC
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 15
• Data Ram Size: 1 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

dsPIC33FJ12MC201/202
REGISTER 15-4:
DS70265D-page 156
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14-0
SEVTDIR
Note 1: SEVTDIR is compared with PTDIR (P
R/W-0
R/W-0
2: PxSECMP<14:0> is compared with P
(1)
SEVTDIR: Special Event Trigger Time Base Direction bit
1 = A Special Event Trigger will occur when the PWM time base is counting down
0 = A Special Event Trigger will occur when the PWM time base is counting up
SEVTCMP<14:0>: Special Event Compare Value bits
R/W-0
R/W-0
PxSECMP: SPECIAL EVENT COMPARE REGISTER
W = Writable bit
‘1’ = Bit is set
R/W-0
R/W-0
R/W-0
R/W-0
SEVTCMP<7:0>
X
X
Preliminary
TMR<14:0> to generate the Special Event Trigger.
TMR<15>) to generate the Special Event Trigger.
SEVTCMP<14:8>
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
R/W-0
(2)
(2)
(1)
(2)
R/W-0
R/W-0
© 2009 Microchip Technology Inc.
x = Bit is unknown
R/W-0
R/W-0
R/W-0
R/W-0
bit 8
bit 0