DSPIC33FJ12GP202-I/ML Microchip Technology, DSPIC33FJ12GP202-I/ML Datasheet - Page 8

• Manufacturer Part Number: DSPIC33FJ12GP202-I/ML
• Description: IC DSPIC MCU/DSP 12K 28QFN
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ12GP202-I/ML

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Core Frequency: 40MHz
• Core Supply Voltage: 2.75V
• Embedded Interface Type: I2C, JTAG, SPI, UART
• No. Of I/o's: 21
• Flash Memory Size: 12KB
• Supply Voltage Range: 3V To 3.6V
• Package: 28QFN EP
• Device Core: dsPIC
• Family Name: dsPIC33
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 21
• Interface Type: I2C/SPI/UART
• On-chip Adc: 10-chx10-bit|10-chx12-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164336 - MODULE SOCKET FOR PM3 28/44QFNDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

dsPIC33F
2.0
The dsPIC33F device family employs a powerful 16-bit
architecture that seamlessly integrates the control
features
computational capabilities of a Digital Signal Processor
(DSP). The resulting functionality is ideal for
applications that rely on high-speed, repetitive
computations, as well as control.
The DSP engine, dual 40-bit accumulators, hardware
support for division operations, barrel shifter, 17 x 17
multiplier, a large array of 16-bit working registers and
FIGURE 2-1:
DS70155C-page 6
Legend:
Divide Control
Barrel Shifter
DSP Engine
ACCA<40>
ACCB<40>
dsPIC33F DEVICE FAMILY
OVERVIEW
MCU/DSP X-Data Path
DSP Y-Data Path
Address Path
of
a
Microcontroller
dsPIC33F DEVICE BLOCK DIAGRAM
17 x 17 Multiplier
W Register
16-bit ALU
Memory
Mapped
16 x 16
(MCU)
Array
with
Preliminary
the
X-Data Bus <16-bit>
Y-Data Bus <16-bit>
Prefetch & Decode
Program Counter
Status Register
Program Flash
Memory Data
Instruction
<23 bits>
X AGU
Access
Y AGU
a wide variety of data addressing modes, together
provide the dsPIC33F Central Processing Unit (CPU)
with extensive mathematical processing capability.
Flexible and deterministic interrupt handling, coupled
with a powerful array of peripherals, renders the
dsPIC33F devices suitable for control applications.
Further, Direct Memory Access (DMA) enables
overhead-free transfer of data between several
peripherals and a dedicated DMA RAM. Reliable, field
programmable
scalability of applications that use dsPIC33F devices.
Figure 2-1 shows a sample device block diagram
typical of the dsPIC33F product family.
23
24
Flash
Data SRAM
256 Kbytes
28 Kbytes
Dual Port
Program
2 Kbytes
Memory
Flash
RAM
up to
up to
© 2005 Microchip Technology Inc.
program
memory
Peripherals
Controller
I/O Ports
DMA
ensures