PIC16F872-I/SS Microchip Technology, PIC16F872-I/SS Datasheet - Page 27

• Manufacturer Part Number: PIC16F872-I/SS
• Description: IC MCU FLASH 2KX14 EE 28SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F872-I/SS

• Core Size: 8-Bit
• Program Memory Size: 3.5KB (2K x 14)
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Type: FLASH
• Eeprom Size: 64 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SSOP
• Controller Family/series: PIC16F
• No. Of I/o's: 22
• Eeprom Memory Size: 64Byte
• Ram Memory Size: 128Byte
• Cpu Speed: 20MHz
• No. Of Timers: 3
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: I2C, SPI, SSP
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 3 bit
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164307 - MODULE SKT FOR PM3 28SSOPAC164020 - MODULE SKT PROMATEII 44TQFPXLT28SS-1 - SOCKET TRANSITION ICE 28SSOP
• Lead Free Status / Rohs Status: Details

3.2
Reading EEPROM Data memory only requires that the
desired address to access be written to the EEADR
register and clear the EEPGD bit. After the RD bit is set,
data will be available in the EEDATA register on the
very next instruction cycle. EEDATA will hold this value
until another read operation is initiated or until it is writ-
ten by firmware.
The steps to reading the EEPROM Data Memory are:
1.
2.
3.
4.
EXAMPLE 3-1:
3.3
There are many steps in writing to the EEPROM Data
memory. Both address and data values must be written
to the SFRs. The EEPGD bit must be cleared and the
WREN bit must be set to enable writes. The WREN bit
EXAMPLE 3-2:
© 2006 Microchip Technology Inc.
BSF
BCF
MOVF
MOVWF
BSF
BCF
BSF
BCF
MOVF
Write the address to EEDATA. Make sure that
the address is not larger than the memory size
of the device.
Clear the EEPGD bit to point to EEPROM Data
memory.
Set the RD bit to start the read operation.
Read the data from the EEDATA register.
Reading the EEPROM Data
Memory
Writing to the EEPROM Data
Memory
STATUS, RP1
STATUS, RP0
ADDR, W
EEADR
STATUS, RP0
EECON1, EEPGD
EECON1, RD
STATUS, RP0
EEDATA, W
BSF
BCF
MOVF
MOVWF
MOVF
MOVWF
BSF
BCF
BSF
BCF
MOVLW
MOVWF
MOVLW
MOVWF
BSF
BSF
BCF
EEPROM DATA WRITE
EEPROM DATA READ
STATUS, RP1
STATUS, RP0
ADDR, W
EEADR
VALUE, W
EEDATA
STATUS, RP0
EECON1, EEPGD
EECON1, WREN
INTCON, GIE
0x55
EECON2
0xAA
EECON2
EECON1, WR
INTCON, GIE
EECON1, WREN
;
;Bank 2
;Write address
;to read from
;Bank 3
;Point to Data memory
;Start read operation
;Bank 2
;W = EEDATA
;
;Bank 2
;Address to
;write to
;Data to
;write
;Bank 3
;Point to Data memory
;Enable writes
;Only disable interrupts
;if already enabled,
;otherwise discard
;Write 55h to
;EECON2
;Write AAh to
;EECON2
;Start write operation
;Only enable interrupts
;if using interrupts,
;otherwise discard
;Disable writes
should be kept clear at all times, except when writing to
the EEPROM Data. The WR bit can only be set if the
WREN bit was set in a previous operation, i.e., they
both cannot be set in the same operation. The WREN
bit should then be cleared by firmware after the write.
Clearing the WREN bit before the write actually com-
pletes will not terminate the write in progress.
Writes to EEPROM Data memory must also be pref-
aced with a special sequence of instructions that pre-
vent inadvertent write operations. This is a sequence of
five instructions that must be executed without interrup-
tion for each byte written.
The steps to write to program memory are:
1.
2.
3.
4.
5.
6.
7.
8.
9.
Write the address to EEADR. Make sure that the
address is not larger than the memory size of
the device.
Write the 8-bit data value to be programmed in
the EEDATA registers.
Clear the EEPGD bit to point to EEPROM Data
memory.
Set the WREN bit to enable program operations.
Disable interrupts (if enabled).
Execute the special five instruction sequence:
• Write 55h to EECON2 in two steps (first to W,
• Write AAh to EECON2 in two steps (first to
• Set the WR bit
Enable interrupts (if using interrupts).
Clear the WREN bit to disable program operations.
At the completion of the write cycle, the WR bit
is cleared and the EEIF interrupt flag bit is set.
(EEIF must be cleared by firmware). Firmware
may check for EEIF to be set or WR to clear to
indicate end of program cycle.
then to EECON2)
W, then to EECON2)
PIC16F872
DS30221C-page 25