PIC18F4321-I/PT Microchip Technology, PIC18F4321-I/PT Datasheet - Page 366

IC PIC MCU FLASH 4KX16 44TQFP

PIC18F4321-I/PT

Manufacturer Part Number
PIC18F4321-I/PT
Description
IC PIC MCU FLASH 4KX16 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F4321-I/PT

Program Memory Type
FLASH
Program Memory Size
8KB (4K x 16)
Package / Case
44-TQFP, 44-VQFP
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
EUSART/I2C/MSSP/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
36
Number Of Timers
4
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
13-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT44PT3 - SOCKET TRAN ICE 44MQFP/TQFPAC164305 - MODULE SKT FOR PM3 44TQFP444-1001 - DEMO BOARD FOR PICMICRO MCUAC164020 - MODULE SKT PROMATEII 44TQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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PIC18F4321-I/PT
0
PIC18F4321 FAMILY
FIGURE 26-23:
TABLE 26-25: A/D CONVERSION REQUIREMENTS
DS39689E-page 364
130
131
132
135
136
Legend: TBD = To Be Determined
Note 1:
Param
No.
A/D CLK
Note 1:
2:
3:
4:
A/D DATA
SAMPLE
T
T
T
T
T
ADRES
Symbol
AD
CNV
ACQ
SWC
BSF ADCON0, GO
DIS
ADIF
The time of the A/D clock period is dependent on the device frequency and the T
ADRES register may be read on the following T
The time for the holding capacitor to acquire the “New” input voltage when the voltage changes full scale
after the conversion (V
On the following cycle of the device clock.
GO
2:
Q4
(1)
If the A/D clock source is selected as RC, a time of T
This allows the SLEEP instruction to be executed.
This is a minimal RC delay (typically 100 ns), which also disconnects the holding capacitor from the analog input.
A/D Clock Period
Conversion Time
(not including acquisition time)
Acquisition Time
Switching Time from Convert → Sample
Discharge Time
132
A/D CONVERSION TIMING
(Note 2)
Characteristic
DD
(3)
9
to V
SS
PIC18FXXXX
PIC18LFXXXX
PIC18FXXXX
PIC18LFXXXX
8
or V
OLD_DATA
SS
(2)
7
Preliminary
to V
. . .
SAMPLING STOPPED
DD
CY
). The source impedance (R
CY
is added before the A/D clock starts.
cycle.
. . .
131
130
TBD
TBD
TBD
Min
0.7
1.4
1.4
0.2
11
2
(Note 4)
25.0
25.0
Max
12
1
3
(1)
(1)
1
Units
T
μs
μs
μs
μs
μs
μs
μs
AD
S
© 2007 Microchip Technology Inc.
) on the input channels is 50Ω.
0
T
V
T
A/D RC mode
V
-40°C to +85°C
0°C ≤ to ≤ +85°C
OSC
OSC
DD
DD
AD
= 2.0V;
= 2.0V; A/D RC mode
based, V
based, V
clock divider.
NEW_DATA
DONE
Conditions
T
CY
REF
REF
≥ 3.0V
full range

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