DSPIC30F2010-20I/SO Microchip Technology, DSPIC30F2010-20I/SO Datasheet - Page 199

• Manufacturer Part Number: DSPIC30F2010-20I/SO
• Description: IC DSPIC MCU/DSP 12K 28SOIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F2010-20I/SO

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 20
• Program Memory Size: 12KB (4K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 20
• Flash Memory Size: 12KB
• Supply Voltage Range: 2.5V To 5.5V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MIL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: DSPIC30F2010-20I/SOG; DSPIC30F201020IS

TimerQ (QEI Module) External Clock Timing Characteristics .
Timing Characteristics
Timing Diagrams
Timing Diagrams and Specifications
Timing Diagrams.See Timing Characteristics
Timing Requirements
© 2008 Microchip Technology Inc.
Timer Prescaler........................................................... 66
167
A/D Conversion
Band Gap Start-up Time ........................................... 164
CLKO and I/O ........................................................... 161
External Clock........................................................... 157
I
I
Input Capture (CAPx)................................................ 168
Motor Control PWM Module...................................... 170
Motor Control PWM Module Falult............................ 170
OC/PWM Module ...................................................... 169
Oscillator Start-up Timer ........................................... 162
Output Compare Module........................................... 168
Power-up Timer ........................................................ 162
QEI Module Index Pulse ........................................... 172
Reset......................................................................... 162
SPI Module
TimerQ (QEI Module) External Clock ....................... 167
Type A and B Timer External Clock.......................... 165
Watchdog Timer........................................................ 162
Center-Aligned PWM .................................................. 87
Dead-Time .................................................................. 89
Edge-Aligned PWM..................................................... 87
PWM Output ............................................................... 75
Time-out Sequence on Power-up
Time-out Sequence on Power-up
Time-out Sequence on Power-up
DC Characteristics - Internal RC Accuracy............... 160
A/D Conversion
Band Gap Start-up Time ........................................... 164
Brown-out Reset ....................................................... 163
CLKO and I/O ........................................................... 161
External Clock........................................................... 158
I
I
Input Capture ............................................................ 168
Motor Control PWM Module...................................... 170
Oscillator Start-up Timer ........................................... 163
Output Compare Module........................................... 168
Power-up Timer ........................................................ 163
QEI Module
2
2
2
2
C Bus Data
C Bus Start/Stop Bits
C Bus Data (Master Mode)..................................... 179
C Bus Data (Slave Mode)....................................... 181
10-Bit High-speed (CHPS = 01, SIMSAM = 0,
10-bit High-speed (CHPS = 01, SIMSAM = 0,
Master Mode ..................................................... 178
Slave Mode ....................................................... 180
Master Mode ..................................................... 178
Slave Mode ....................................................... 180
Master Mode (CKE = 0) .................................... 173
Master Mode (CKE = 1) .................................... 174
Slave Mode (CKE = 0) ...................................... 175
Slave Mode (CKE = 1) ...................................... 176
(MCLR Not Tied to V
(MCLR Not Tied to V
(MCLR Tied to V
High-speed ....................................................... 186
External Clock................................................... 167
ASAM = 0, SSRC = 000) .......................... 184
ASAM = 1, SSRC = 111, SAMC = 00001) 185
DD
).......................................... 130
DD
DD
), Case 1...................... 130
), Case 2...................... 130
Timing Specifications
U
UART
Unit ID Locations .............................................................. 123
Universal Asynchronous Receiver Transmitter. See UART.
W
Wake-up from Sleep ......................................................... 123
Wake-up from Sleep and Idle ............................................. 43
Watchdog Timer
Watchdog Timer (WDT)............................................ 123, 133
WWW Address ................................................................. 198
WWW, On-Line Support ....................................................... 6
Quadrature Decoder................................................. 171
Reset ........................................................................ 163
Simple OC/PWM Mode ............................................ 169
SPI Module
Type A Timer External Clock.................................... 165
Type B Timer External Clock.................................... 166
Type C Timer External Clock.................................... 166
Watchdog Timer ....................................................... 163
PLL Clock ................................................................. 159
Address Detect Mode ............................................... 109
Auto Baud Support ................................................... 109
Baud Rate Generator ............................................... 109
Enabling and Setting Up UART ................................ 107
Loopback Mode ........................................................ 109
Module Overview...................................................... 105
Operation During CPU Sleep and Idle Modes.......... 110
Receiving Data ......................................................... 108
Reception Error Handling ......................................... 108
Transmitting Data ..................................................... 107
UART1 Register Map ............................................... 111
Timing Characteristics .............................................. 162
Timing Requirements ............................................... 163
Enabling and Disabling............................................. 133
Operation.................................................................. 133
Index Pulse....................................................... 172
Master Mode (CKE = 0).................................... 173
Master Mode (CKE = 1).................................... 174
Slave Mode (CKE = 0)...................................... 175
Slave Mode (CKE = 1)...................................... 177
Alternate I/O ..................................................... 107
Disabling........................................................... 107
Enabling ........................................................... 107
Setting Up Data, Parity and Stop
In 8-bit or 9-bit Data Mode................................ 108
Interrupt ............................................................ 108
Receive Buffer (UxRXB)................................... 108
Framing Error (FERR) ...................................... 109
Idle Status ........................................................ 109
Parity Error (PERR) .......................................... 109
Receive Break .................................................. 109
Receive Buffer Overrun Error (OERR Bit) ........ 108
In 8-bit Data Mode ............................................ 107
In 9-bit Data Mode ............................................ 107
Interrupt ............................................................ 108
Transmit Buffer (UxTXB) .................................. 107
Bit Selections............................................ 107
dsPIC30F2010
DS70118H-page 199