PIC18LF6310-I/PT Microchip Technology, PIC18LF6310-I/PT Datasheet - Page 3

• Manufacturer Part Number: PIC18LF6310-I/PT
• Description: IC PIC MCU FLASH 4KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF6310-I/PT

• Core Size: 8-Bit
• Program Memory Size: 8KB (4K x 16)
• Oscillator Type: Internal
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 54
• Ram Memory Size: 768Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• No. Of Pwm: RoHS Compliant
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6. Module: CCP
© 2007 Microchip Technology Inc.
When operating either Timer1 or Timer3 as a
counter with a prescale value other than 1:1 and
operating the CCP in Compare mode with the
Special
CCP1M3:CCP1M0 = 1011), the Special Event
Trigger Reset of the timer occurs as soon as there
is
CCPR1H:CCPR1L.
This differs from the PIC18F452, where the Special
Event Trigger Reset of the timer occurs on the next
prescaler output pulse after the match between
TMRxH:TMRxL and CCPR1H:CCPR1L.
Work around
To achieve the same timer Reset period on the
PIC18F8410 family as the PIC18F452 family for a
given clock source, add 1 to the value in
CCPR1H:CCPR1L.
CCPR1H:CCPR1L = x for the PIC18F452, to
achieve
PIC18F8410 family, CCPR1H:CCPR1L = x + 1,
where the prescale is 1, 2, 4 or 8 depending on the
T1CKPS1:T1CKPS0 bit values.
Date Codes that pertain to this issue:
All engineering and production devices.
a
match
the
Event
same
between
Trigger
In
Reset
TMRxH:TMRxL
other
(CCP1CON
period
words,
PIC18F6310/6410/8310/8410
on
and
bits
the
if
7. Module: CCP
The CCP1 and CCP2 configured for PWM mode,
with 1:1 Timer2 prescaler and duty cycle set to the
period minus 1, may result in the PWM output(s)
remaining at a logic low level.
Clearing the PR2 register to select the fastest
period may also result in the output(s) remaining at
a logic low output level.
Work around
To ensure a reliable waveform, verify that the
selected duty cycle does not equal the 10-bit
period minus 1 prior to writing these locations, or
use 1:4 or 1:16 Timer2 prescale. Also, verify the
PR2 register is not written to 00h.
All other duty cycle and period settings will function
as described in the Device Data Sheet.
The CCP modules remain capable of 10-bit
accuracy.
Date Codes that pertain to this issue:
All engineering and production devices.
DS80206F-page 3