PIC18F47J13-I/PT Microchip Technology, PIC18F47J13-I/PT Datasheet - Page 314

IC PIC MCU 128KB FLASH 44TQFP

PIC18F47J13-I/PT

Manufacturer Part Number
PIC18F47J13-I/PT
Description
IC PIC MCU 128KB FLASH 44TQFP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F47J13-I/PT

Program Memory Type
FLASH
Program Memory Size
128KB (64K x 16)
Package / Case
*
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
34
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 13x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
I2C, SPI, EUSART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
25
Number Of Timers
8
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
DM164128, DM180021, DM183026-2, DV164131, MA180030, DM183022, DM183032, DV164136, MA180024
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 13 Channel
Controller Family/series
PIC18
Cpu Speed
48MHz
Embedded Interface Type
I2C, SPI, USART
Digital Ic Case Style
TQFP
Supply Voltage Range
1.8V To 5.5V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA180030 - BOARD DEMO PIC18F47J13 FS USBMA180029 - BOARD DEMO PIC18F47J53 FS USB
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F47J13-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18F47J13 FAMILY
REGISTER 20-8:
REGISTER 20-9:
DS39974A-page 314
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5-2
bit 1
bit 0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
Note 1:
GCEN
R/W-0
R/W-1
MSK7
bit 7
2:
2:
If the I
(or writes to the SSPxBUF are disabled).
This bit is unimplemented in I
This register shares the same SFR address as SSPxADD and is only addressable in select MSSP
operating modes. See Section 20.5.3.4 “7-Bit Address Masking Mode” for more details.
MSK0 is not used as a mask bit in 7-bit addressing.
GCEN: General Call Enable bit (Slave mode only)
1 = Enables interrupt when a general call address (0000h) is received in the SSPxSR
0 = General call address disabled
ACKSTAT: Acknowledge Status bit
Unused in Slave mode.
ADMSK<5:2>: Slave Address Mask Select bits (5-bit address masking)
1 = Masking of the corresponding bits of SSPxADD is enabled
0 = Masking of the corresponding bits of SSPxADD is disabled
ADMSK1: Slave Address Least Significant bit(s) Mask Select bit
In 7-Bit Addressing mode:
1 = Masking of SSPxADD<1> only is enabled
0 = Masking of SSPxADD<1> only is disabled
In 10-Bit Addressing mode:
1 = Masking of SSPxADD<1:0> is enabled
0 = Masking of SSPxADD<1:0> is disabled
SEN: Start Condition Enable/Stretch Enable bit
1 = Clock stretching is enabled for both slave transmit and slave receive (stretch enabled)
0 = Clock stretching is disabled
MSK<7:0>: Slave Address Mask Select bits
1 = Masking of the corresponding bit of SSPxADD is enabled
0 = Masking of the corresponding bit of SSPxADD is disabled
ACKSTAT
2
C module is active, these bits may not be set (no spooling) and the SSPxBUF may not be written
R/W-1
MSK6
R-0
SSPxCON2: MSSPx CONTROL REGISTER 2 (I
(1, ACCESS FC5h; 2, F71h)
SSPxMSK: I
(1, ACCESS FC8h; 2, F74h)
(2)
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
ADMSK5
R/W-0
R/W-1
MSK5
2
C™ SLAVE ADDRESS MASK REGISTER (7-BIT MASKING MODE)
2
C Slave mode.
ADMSK4
R/W-0
R/W-1
MSK4
(2)
Preliminary
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
ADMSK3
(1)
R/W-0
R/W-1
MSK3
ADMSK2
2
R/W-0
R/W-1
MSK2
C™ SLAVE MODE)
 2010 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
ADMSK1
R/W-0
R/W-1
MSK1
MSK0
SEN
R/W-0
R/W-1
bit 0
(1)
(2)
bit 0

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