PIC16F84A-20/SS Microchip Technology, PIC16F84A-20/SS Datasheet - Page 470

IC MCU FLASH 1KX14 EE 20SSOP

PIC16F84A-20/SS

Manufacturer Part Number
PIC16F84A-20/SS
Description
IC MCU FLASH 1KX14 EE 20SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F84A-20/SS

Core Size
8-Bit
Program Memory Size
1.75KB (1K x 14)
Core Processor
PIC
Speed
20MHz
Peripherals
POR, WDT
Number Of I /o
13
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
68 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
20-SSOP
Controller Family/series
PIC16F
No. Of I/o's
13
Eeprom Memory Size
64Byte
Ram Memory Size
68Byte
Cpu Speed
20MHz
No. Of Timers
1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT20SS1-1 - SOCKET TRANSITION 20DIP 20SSOPI3-DB16F84A - BOARD DAUGHTER ICEPIC3AC164307 - MODULE SKT FOR PM3 28SSOPAC164018 - MODULE SKT PROMATEII 20SSOP
Data Converters
-
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
PICmicro MID-RANGE MCU FAMILY
25.4
DS31025A-page 25-12
COM0
COM1
COM2
COM3
T
T
FWR
FINT
LCD Interrupts
= T
= (T
Frame
Boundary
(T
FRAME
FWR
FWR
The LCD timing generation provides an interrupt that defines the LCD frame timing. This interrupt
can be used to coordinate the writing of the pixel data with the start of a new frame. Writing pixel
data at the frame boundary allows a visually crisp transition of the image. This interrupt can also
be used to synchronize external events to the LCD. For example, the interface to an external seg-
ment driver, such as a Microchip AY0438, can be synchronized for segment data update to the
LCD frame.
A new frame is defined to begin at the leading edge of the COM0 common signal. The interrupt
will be set immediately after the LCD controller completes accessing all pixel data required for a
frame. This will occur at a certain fixed time before the frame boundary as shown in
The LCD controller will begin to access data for the next frame within T
Figure 25-7:
/2 - (2T
/2 - (1T
/(LMUX1:LMUX0 + 1)
CY
CY
+ 40 ns))
+ 40 ns))
Example Waveforms in 1/4 MUX Drive
min.
max.
1 Frame
LCD
Interrupt
occurs
T
FWR
T
FINT
Controller accesses
next frame data
Frame
Boundary
1997 Microchip Technology Inc.
FWR
after the interrupt.
Figure
V3
V2
V1
V0
V3
V2
V1
V0
V3
V2
V1
V0
V3
V2
V1
V0
25-7.

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