AT89C51IC2-SLRIL Atmel, AT89C51IC2-SLRIL Datasheet - Page 106
![IC MCU FLASH 8051 32K 3V 44-PLCC](/photos/6/70/67043/453-44-plcc_sml.jpg)
AT89C51IC2-SLRIL
Manufacturer Part Number
AT89C51IC2-SLRIL
Description
IC MCU FLASH 8051 32K 3V 44-PLCC
Manufacturer
Atmel
Series
89Cr
Datasheet
1.AT89C51IC2-SLRIM.pdf
(147 pages)
Specifications of AT89C51IC2-SLRIL
Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
34
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Other names
AT89C51IC2SLRILTR
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Reduced EMI Mode
106
AT89C51IC2
The ALE signal is used to demultiplex address and data buses on port 0 when used with
external program or data memory. Nevertheless, during internal code execution, ALE
signal is still generated. In order to reduce EMI, ALE signal can be disabled by setting
AO bit.
The AO bit is located in AUXR register at bit location 0. As soon as AO is set, ALE is no
longer output but remains active during MOVX and MOVC instructions and external
fetches. During ALE disabling, ALE pin is weakly pulled high.
Table 83. AUXR Register
AUXR - Auxiliary Register (8Eh)
Number
Bit
7
7
6
5
4
3
2
1
0
-
Mnemonic Description
EXTRAM
XRS1
XRS0
Bit
M0
AO
6
-
-
-
-
Reserved
The value read from this bit is indeterminate. Do not set this bit
Reserved
The value read from this bit is indeterminate. Do not set this bit
Pulse length
Cleared to stretch MOVX control: the RD/ and the WR/ pulse length is 6 clock
periods (default).
Set to stretch MOVX control: the RD/ and the WR/ pulse length is 30 clock
periods.
Reserved
The value read from this bit is indeterminate. Do not set this bit
XRAM Size
XRS1XRS0XRAM size
0
0
1
1
EXTRAM bit
Cleared to access internal XRAM using movx @ Ri/ @ DPTR.
Set to access external memory.
Programmed by hardware after Power-up regarding Hardware Security Byte
(HSB), default setting, XRAM selected.
ALE Output bit
Cleared, ALE is emitted at a constant rate of 1/6 the oscillator frequency (or 1/3 if
X2 mode is used).(default) Set, ALE is active only during a MOVX or MOVC
instructione is used.
0256 bytes (default)
1512 bytes
0768 bytes
11024 bytes
M0
5
4
-
XRS1
3
XRS0
2
EXTRAM
1
4301D–8051–02/08
AO
0
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