PIC16F747-I/PT Microchip Technology, PIC16F747-I/PT Datasheet - Page 41

IC PIC MCU FLASH 4KX14 44TQFP

PIC16F747-I/PT

Manufacturer Part Number
PIC16F747-I/PT
Description
IC PIC MCU FLASH 4KX14 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F747-I/PT

Core Size
8-Bit
Program Memory Size
7KB (4K x 14)
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Number Of I /o
36
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Controller Family/series
PIC16F
No. Of I/o's
36
Ram Memory Size
368Byte
Cpu Speed
20MHz
No. Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT44PT3 - SOCKET TRAN ICE 44MQFP/TQFPI3DBF777 - BOARD DAUGHTER ICEPIC3AC164305 - MODULE SKT FOR PM3 44TQFP444-1001 - DEMO BOARD FOR PICMICRO MCUAC164020 - MODULE SKT PROMATEII 44TQFP
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F747-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC16F747-I/PT
Manufacturer:
MICROCH
Quantity:
20 000
FIGURE 4-6:
4.6.4
The IRCF bits can be modified at any time regardless of
which clock source is currently being used as the
system clock. The internal oscillator allows users to
change the frequency during run time. This is achieved
by modifying the IRCF bits in the OSCCON register.
The sequence of events that occur after the IRCF bits
are modified is dependent upon the initial value of the
IRCF bits before they are modified. If the INTRC
(31.25 kHz, IRCF<2:0> = 000) is running and the IRCF
bits are modified to any other value than ‘000’, a 4 ms
(approx.) clock switch delay is turned on. Code execu-
tion continues at a higher than expected frequency
while the new frequency stabilizes. Time sensitive code
should wait for the IOFS bit in the OSCCON register to
become set before continuing. This bit can be
monitored to ensure that the frequency is stable before
using the system clock in time critical applications.
 2004 Microchip Technology Inc.
T1OSO
T1OSI
OSC2
OSC1
MODIFYING THE IRCF BITS
Secondary Oscillator
Primary Oscillator
31.25 kHz
PIC16F7X7 CLOCK DIAGRAM
(INTRC)
Oscillator
31.25 kHz
Internal
Source
T1OSCEN
Enable
Oscillator
Block
Sleep
(INTOSC)
8 MHz
31.25 kHz
500 kHz
250 kHz
125 kHz
8 MHz
4 MHz
2 MHz
1 MHz
OSCCON<6:4>
If the IRCF bits are modified while the internal oscillator
is running at any other frequency than INTRC
(31.25 kHz, IRCF<2:0>
4 ms (approx.) clock switch delay. The new INTOSC
frequency will be stable immediately after the eight
falling edges. The IOFS bit will remain set after clock
switching occurs.
111
110
101
100
011
010
001
000
Note:
To Timer1
LP, XT, HS, RC, EC
Caution must be taken when modifying the
IRCF bits using BCF or BSF instructions. It
is possible to modify the IRCF bits to a
frequency that may be out of the V
specification range; for example:
V
DD
Internal Oscillator
= 2.0V and IRCF = 111 (8 MHz).
CONFIG1 (FOSC2:FOSC0)
T1OSC
SCS<1:0> (T1OSC)
PIC16F7X7
000), there is no need for a
DS30498C-page 39
WDT, FSCM
Peripherals
CPU
DD

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