PIC16F747-I/PT Microchip Technology, PIC16F747-I/PT Datasheet - Page 67

IC PIC MCU FLASH 4KX14 44TQFP

PIC16F747-I/PT

Manufacturer Part Number
PIC16F747-I/PT
Description
IC PIC MCU FLASH 4KX14 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F747-I/PT

Core Size
8-Bit
Program Memory Size
7KB (4K x 14)
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Number Of I /o
36
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Controller Family/series
PIC16F
No. Of I/o's
36
Ram Memory Size
368Byte
Cpu Speed
20MHz
No. Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT44PT3 - SOCKET TRAN ICE 44MQFP/TQFPI3DBF777 - BOARD DAUGHTER ICEPIC3AC164305 - MODULE SKT FOR PM3 44TQFP444-1001 - DEMO BOARD FOR PICMICRO MCUAC164020 - MODULE SKT PROMATEII 44TQFP
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F747-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC16F747-I/PT
Manufacturer:
MICROCH
Quantity:
20 000
5.3
PORTC is an 8-bit wide, bidirectional port. The corre-
sponding data direction register is TRISC. Setting a
TRISC bit (= 1) will make the corresponding PORTC
pin an input (i.e., put the corresponding output driver in
a high-impedance mode). Clearing a TRISC bit (= 0)
will make the corresponding PORTC pin an output (i.e.,
put the contents of the output latch on the selected pin).
PORTC is multiplexed with several peripheral functions
(Table 5-5). PORTC pins have Schmitt Trigger input
buffers.
When enabling peripheral functions, care should be
taken in defining TRIS bits for each PORTC pin. Some
peripherals override the TRIS bit to make a pin an
output, while other peripherals override the TRIS bit to
make a pin an input. Since the TRIS bit override is in
effect while the peripheral is enabled, read-modify-
write instructions (BSF, BCF, XORWF) with TRISC as
destination should be avoided. The user should refer to
the corresponding peripheral section for the correct
TRIS bit settings and to Section 16.1 “Read-Modify-
Write Operations” for additional information on
read-modify-write operations.
FIGURE 5-16:
 2004 Microchip Technology Inc.
Port/Peripheral Select
Peripheral Data Out
Data Bus
WR
Port
WR
TRIS
RD
TRIS
Peripheral
OE
RD
Port
Peripheral Input
Note 1: I/O pins have diode protection to V
(3)
2: Port/Peripheral Select signal selects between port
3: Peripheral OE (Output Enable) is only activated if
PORTC and the TRISC Register
data and peripheral output.
Peripheral Select is active.
TRIS Latch
Data Latch
D
D
CK
CK
(2)
Q
Q
Q
Q
PORTC BLOCK DIAGRAM
(PERIPHERAL OUTPUT
OVERRIDE) RC<2:0>,
RC<7:5> PINS
0
1
Q
EN
D
DD
Schmitt
Trigger
and V
V
V
N
P
SS
DD
SS
.
I/O
pin
(1)
FIGURE 5-17:
Port/Peripheral Select
Peripheral Data Out
Data Bus
WR
Port
WR
TRIS
RD
TRIS
Peripheral
OE
RD
Port
SSPl Input
Note 1: I/O pins have diode protection to V
(3)
2: Port/Peripheral Select signal selects between port data
3: Peripheral OE (Output Enable) is only activated if
and peripheral output.
Peripheral Select is active.
TRIS Latch
Data Latch
D
D
CK
CK
(2)
Q
Q
Q
Q
PORTC BLOCK DIAGRAM
(PERIPHERAL OUTPUT
OVERRIDE) RC<4:3> PINS
0
1
PIC16F7X7
Q
SSPSTAT<6>
CKE
EN
D
Schmitt
Trigger
DS30498C-page 65
DD
and V
Vss
0
1
V
N
P
DD
SS
Schmitt
Trigger
with
SMBus
Levels
.
I/O
pin
(1)

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