PIC18LF2331-I/SP Microchip Technology, PIC18LF2331-I/SP Datasheet - Page 120
![IC MCU FLASH 4KX16 28-DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC18LF2331-I/SP
Manufacturer Part Number
PIC18LF2331-I/SP
Description
IC MCU FLASH 4KX16 28-DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC18F2331-ISO.pdf
(392 pages)
4.PIC18F2331-ISO.pdf
(8 pages)
5.PIC18F2331-ISO.pdf
(6 pages)
6.PIC18F2331-ISO.pdf
(16 pages)
7.PIC18LF2331-ISO.pdf
(4 pages)
8.PIC18LF2331-ISO.pdf
(40 pages)
Specifications of PIC18LF2331-I/SP
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F818-ISO PDF datasheet #2
- PIC18F2331-ISO PDF datasheet #3
- PIC18F2331-ISO PDF datasheet #4
- PIC18F2331-ISO PDF datasheet #5
- PIC18F2331-ISO PDF datasheet #6
- PIC18LF2331-ISO PDF datasheet #7
- PIC18LF2331-ISO PDF datasheet #8
- Current page: 120 of 392
- Download datasheet (4Mb)
PIC18F2331/2431/4331/4431
TABLE 11-5:
DS39616D-page 120
RC0/T1OSO/
T1CKI
RC1/T1OSI/
CCP2/FLTA
RC2/CCP1/FLTB
RC3/T0CKI/
T5CKI/INT0
RC4/INT1/SDI/
SDA
RC5/INT2/SCK/
SCL
RC6/TX/CK/SS
Legend:
Note 1:
Pin
DIG = Digital level output; TTL = TTL input buffer; ST = Schmitt Trigger input buffer; ANA = Analog level input/output;
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
RD0 is the alternate pin for T0CKI/T5CKI; RD2 is the alternate pin for SDI/SDA; RD3 is the alternate pin for SCK/SCL;
RD1 is the alternate pin for SDO.
PORTC I/O SUMMARY
Function
T0CKI
T5CKI
T1OSO
SDA
SCK
SCL
T1CKI
T1OSI
CCP2
CCP1
SDI
FLTA
FLTB
INT0
INT1
INT2
RC0
RC1
RC2
RC3
RC4
RC5
RC6
CK
TX
SS
(1)
(1)
(1)
(1)
(1)
(1)
Setting
TRIS
0
1
x
1
0
1
x
0
1
1
0
1
0
1
1
0
1
1
1
1
0
1
1
1
0
1
0
1
1
0
1
0
1
0
1
0
0
1
1
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Type
ANA
ANA
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
I
I
I/O
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
2
2
C
C
LATC<0> data output.
PORTC<0> data input.
Timer1 oscillator output; enabled when Timer1 oscillator is enabled.
Disables digital I/O.
Timer1/Timer3 counter input.
LATC<1> data output.
PORTC<1> data input.
Timer1 oscillator input; enabled when Timer1 oscillator is enabled.
Disables digital I/O.
CCP2 compare and PWM output; takes priority over port data.
CCP2 capture input.
Fault Interrupt Input Pin A.
LATC<2> data output.
PORTC<2> data input.
CCP1 compare or PWM output; takes priority over port data.
CCP1 capture input.
Fault Interrupt Input Pin B.
LATC<3> data output.
PORTC<3> data input.
Timer0 alternate clock input.
Timer5 alternate clock input.
External Interrupt 0.
LATC<4> data output.
PORTC<4> data input.
External Interrupt 1.
SPI data input (SSP module).
I
I
LATC<5> data output.
PORTC<5> data input.
External Interrupt 2.
SPI clock output (SSP module); takes priority over port data.
SPI clock input (SSP module).
I
I
LATC<6> data output.
PORTC<6> data input.
Asynchronous serial transmit data output (EUSART module);
takes priority over port data. User must configure as an output.
Synchronous serial clock output (EUSART module); takes priority
over port data.
Synchronous serial clock input (EUSART module).
SPI slave select input.
2
2
2
2
C™ data output (SSP module); takes priority over port data.
C data input (SSP module).
C clock output (SSP module); takes priority over port data.
C clock input (SSP module); input type depends on module setting.
Description
2010 Microchip Technology Inc.
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