PIC18LF2331-I/SP Microchip Technology, PIC18LF2331-I/SP Datasheet - Page 150
![IC MCU FLASH 4KX16 28-DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC18LF2331-I/SP
Manufacturer Part Number
PIC18LF2331-I/SP
Description
IC MCU FLASH 4KX16 28-DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC18F2331-ISO.pdf
(392 pages)
4.PIC18F2331-ISO.pdf
(8 pages)
5.PIC18F2331-ISO.pdf
(6 pages)
6.PIC18F2331-ISO.pdf
(16 pages)
7.PIC18LF2331-ISO.pdf
(4 pages)
8.PIC18LF2331-ISO.pdf
(40 pages)
Specifications of PIC18LF2331-I/SP
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F818-ISO PDF datasheet #2
- PIC18F2331-ISO PDF datasheet #3
- PIC18F2331-ISO PDF datasheet #4
- PIC18F2331-ISO PDF datasheet #5
- PIC18F2331-ISO PDF datasheet #6
- PIC18LF2331-ISO PDF datasheet #7
- PIC18LF2331-ISO PDF datasheet #8
- Current page: 150 of 392
- Download datasheet (4Mb)
PIC18F2331/2431/4331/4431
The CCPR1H register and a 2-bit internal latch are
used to double buffer the PWM duty cycle. This double
buffering is essential for glitchless PWM operation.
When the CCPR1H and 2-bit latch match TMR2,
concatenated with an internal 2-bit Q clock or two bits
of the TMR2 prescaler, the CCP1 pin is cleared. The
maximum PWM resolution (bits) for a given PWM
frequency is given by the following equation:
EQUATION 16-3:
TABLE 16-3:
TABLE 16-4:
DS39616D-page 150
INTCON
PIR1
PIE1
IPR1
TRISC
TMR2
PR2
T2CON
CCPR1L
CCPR1H
CCP1CON
CCPR2L
CCPR2H
CCP2CON
Legend: x = unknown, u = unchanged, - = unimplemented, read as ‘0’. Shaded cells are not used by PWM and
Timer Prescaler (1, 4, 16)
PR2 Value
Maximum Resolution (bits)
Note:
Name
PWM Resolution (max) =
PWM Frequency
Timer2.
If the PWM duty cycle value is longer than
the PWM period, the CCP1 pin will not be
cleared.
PORTC Data Direction Register
Timer2 Register
Timer2 Period Register
Capture/Compare/PWM Register 1 Low Byte
Capture/Compare/PWM Register 1 High Byte
Capture/Compare/PWM Register 2 Low Byte
Capture/Compare/PWM Register 2 High Byte
GIE/GIEH PEIE/GIEL
Bit 7
—
—
—
—
—
—
EXAMPLE PWM FREQUENCIES AND RESOLUTIONS AT 40 MHz
REGISTERS ASSOCIATED WITH PWM AND TIMER2
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0
ADIF
ADIE
ADIP
Bit 6
—
—
log
log(2)
F
2.44 kHz
F
PWM
OSC
FFh
16
10
TMR0IE
DC1B1
DC2B1
RCIE
RCIP
RCIF
Bit 5
bits
9.77 kHz
DC1B0
DC2B0
INT0IE
Bit 4
TXIF
TXIE
TXIP
FFh
10
4
CCP2M3 CCP2M2 CCP2M1 CCP2M0
CCP1M3 CCP1M2 CCP1M1 CCP1M0
SSPIF
SSPIE
SSPIP
RBIE
39.06 kHz
Bit 3
16.5.3
The following steps should be taken when configuring
the CCP1 module for PWM operation:
1.
2.
3.
4.
5.
FFh
10
1
Set the PWM period by writing to the PR2 register.
Set the PWM duty cycle by writing to the CCPR1L
register and CCP1CON<5:4> bits.
Make the CCP1 pin an output by clearing the
TRISC<2> bit.
Set the TMR2 prescale value and enable Timer2
by writing to T2CON.
Configure the CCP1 module for PWM operation.
TMR0IF
CCP1IE
CCP1IP
CCP1IF
Bit 2
SETUP FOR PWM OPERATION
156.25 kHz
3Fh
1
8
TMR2IF
TMR2IE
TMR2IP
INT0IF
Bit 1
2010 Microchip Technology Inc.
312.50 kHz
TMR1IF
TMR1IE
TMR1IP
1Fh
RBIF
Bit 0
1
7
Reset Values
416.67 kHz
on Page:
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