PIC24HJ128GP202-I/SP Microchip Technology, PIC24HJ128GP202-I/SP Datasheet - Page 221
![IC PIC MCU FLASH 128K 28DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC24HJ128GP202-I/SP
Manufacturer Part Number
PIC24HJ128GP202-I/SP
Description
IC PIC MCU FLASH 128K 28DIP
Manufacturer
Microchip Technology
Series
PIC® 24Hr
Datasheets
1.PIC24HJ12GP201-ISO.pdf
(84 pages)
2.PIC24HJ32GP302-ISO.pdf
(368 pages)
3.PIC24HJ32GP302-ISO.pdf
(8 pages)
4.PIC24HJ32GP302-ISO.pdf
(12 pages)
5.PIC24HJ32GP304-EML.pdf
(356 pages)
Specifications of PIC24HJ128GP202-I/SP
Program Memory Type
FLASH
Program Memory Size
128KB (43K x 24)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
21
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24HJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM300027
Minimum Operating Temperature
- 40 C
On-chip Adc
10-ch x 10-bit or 10-ch x 12-bit
Controller Family/series
PIC24
No. Of I/o's
21
Ram Memory Size
8KB
Cpu Speed
40MIPS
No. Of Timers
7
Embedded Interface Type
I2C, SPI, UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164337 - MODULE SOCKET FOR PM3 40DIP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- PIC24HJ12GP201-ISO PDF datasheet
- PIC24HJ32GP302-ISO PDF datasheet #2
- PIC24HJ32GP302-ISO PDF datasheet #3
- PIC24HJ32GP302-ISO PDF datasheet #4
- PIC24HJ32GP304-EML PDF datasheet #5
- Current page: 221 of 356
- Download datasheet (6Mb)
20.0
The PIC24HJ32GP302/304, PIC24HJ64GPX02/X04
and PIC24HJ128GPX02/X04 devices have up to 13
ADC input channels.
The AD12B bit (AD1CON1<10>) allows each of the
ADC modules to be configured by the user as either a
10-bit, 4-sample/hold ADC (default configuration) or a
12-bit, 1-sample/hold ADC.
20.1
The 10-bit ADC configuration has the following key
features:
• Successive Approximation (SAR) conversion
• Conversion speeds of up to 1.1 Msps
• Up to 13 analog input pins
• External voltage reference input pins
• Simultaneous sampling of up to four analog input
• Automatic Channel Scan mode
• Selectable conversion trigger source
• Selectable Buffer Fill modes
• Operation during CPU Sleep and Idle modes
The 12-bit ADC configuration supports all the above
features, except:
• In the 12-bit configuration, conversion speeds of
• There is only one sample/hold amplifier in the
© 2009 Microchip Technology Inc.
Note:
pins
up to 500 ksps are supported
12-bit configuration, so simultaneous sampling of
multiple channels is not supported.
Note 1: This data sheet summarizes the features
2: Some registers and associated bits
10-BIT/12-BIT
ANALOG-TO-DIGITAL
CONVERTER (ADC1)
Key Features
The ADC module needs to be disabled
before modifying the AD12B bit.
of
PIC24HJ64GPX02/X04
PIC24HJ128GPX02/X04
devices. It is not intended to be a compre-
hensive reference source. To comple-
ment the information in this data sheet,
refer to Section 16. “Analog-to-Digital
Converter (ADC)” (DS70225) of the
“dsPIC33F/PIC24H Family Reference
Manual”, which is available from the
Microchip website (www.microchip.com).
described in this section may not be avail-
able on all devices. Refer to Section 4.0
“Memory Organization” in this data
sheet for device-specific register and bit
information.
the
PIC24HJ32GP302/304,
families
and
Preliminary
of
Depending on the particular device pinout, the ADC
can have up to 13 analog input pins, designated AN0
through AN12. In addition, there are two analog input
pins for external voltage reference connections. These
voltage reference inputs can be shared with other
analog input pins. The actual number of analog input
pins and external voltage reference input configuration
depends on the specific device.
Block diagrams of the ADC module are shown in
Figure 20-1 and Figure 20-2.
20.2
The following configuration steps should be performed.
1.
2.
20.3
If more than one conversion result needs to be buffered
before triggering an interrupt, DMA data transfers can
be used. ADC1 can trigger a DMA data transfer. If
ADC1 is selected as the DMA IRQ source, a DMA
transfer occurs when the AD1IF bit gets set as a result
of an ADC1 sample conversion sequence.
The SMPI<3:0> bits (AD1CON2<5:2>) are used to
select how often the DMA RAM buffer pointer is
incremented.
The ADDMABM bit (AD1CON1<12>) determines how
the conversion results are filled in the DMA RAM buffer
area being used for ADC. If this bit is set, DMA buffers
are written in the order of conversion. The module
provides an address to the DMA channel that is the
same as the address used for the non-DMA
stand-alone buffer. If the ADDMABM bit is cleared, then
DMA buffers are written in Scatter/Gather mode. The
module provides a scatter/gather address to the DMA
channel, based on the index of the analog input and the
size of the DMA buffer.
Configure the ADC module:
a)
b)
c)
d)
e)
f)
g)
Configure ADC interrupt (if required):
a)
b)
ADC Initialization
Select
(AD1PCFGH<15:0> or AD1PCFGL<15:0>)
Select voltage reference source to match
expected
(AD1CON2<15:13>)
Select the analog conversion clock to
match desired data rate with processor
clock (AD1CON3<7:0>)
Determine how many S/H channels are
used
AD1PCFGH<15:0> or AD1PCFGL<15:0>)
Select the appropriate sample/conversion
sequence
AD1CON3<12:8>)
Select
presented in the buffer (AD1CON1<9:8>)
Turn on ADC module (AD1CON1<15>)
Clear the AD1IF bit
Select ADC interrupt priority
ADC and DMA
port
how
range
(AD1CON2<9:8>
pins
(AD1CON1<7:5>
conversion
on
as
DS70293D-page 221
analog
analog
results
inputs
inputs
and
and
are
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