PIC16LF876A-I/SS Microchip Technology, PIC16LF876A-I/SS Datasheet - Page 134
![IC MCU FLASH 8KX14 EE A/D 28SSOP](/photos/6/81/68119/150-28-ssop_sml.jpg)
PIC16LF876A-I/SS
Manufacturer Part Number
PIC16LF876A-I/SS
Description
IC MCU FLASH 8KX14 EE A/D 28SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Specifications of PIC16LF876A-I/SS
Core Size
8-Bit
Program Memory Size
14KB (8K x 14)
Core Processor
PIC
Speed
10MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Controller Family/series
PIC16LF
No. Of I/o's
22
Eeprom Memory Size
256Byte
Ram Memory Size
368Byte
Cpu Speed
20MHz
No. Of Timers
3
Package
28SSOP
Device Core
PIC
Family Name
PIC16
Maximum Speed
20 MHz
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
22
Interface Type
I2C/SPI/USART
On-chip Adc
5-chx10-bit
Number Of Timers
3
Core
PIC
Processor Series
PIC16LF
Maximum Clock Frequency
20 MHz
Data Ram Size
368 B
Data Rom Size
256 B
Mounting Style
SMD/SMT
Height
1.75 mm
Length
10.2 mm
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2 V
Width
5.3 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
PIC16LF876AI/SS
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16LF876A-I/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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PIC16F87XA
11.4
Clearing the GO/DONE bit during a conversion will
abort the current conversion. The A/D Result register
pair will NOT be updated with the partially completed
A/D conversion sample. That is, the ADRESH:ADRESL
registers will continue to contain the value of the last
completed conversion (or the last value written to the
ADRESH:ADRESL registers). After the A/D conversion
FIGURE 11-3:
11.4.1
The ADRESH:ADRESL register pair is the location
where the 10-bit A/D result is loaded at the completion
of the A/D conversion. This register pair is 16 bits wide.
The A/D module gives the flexibility to left or right justify
the 10-bit result in the 16-bit result register. The A/D
FIGURE 11-4:
DS39582B-page 132
A/D Conversions
A/D RESULT REGISTERS
T
CY
Set GO bit
Holding capacitor is disconnected from analog input (typically 100 ns)
7
to T
0000 00
ADRESH
AD
Conversion starts
A/D CONVERSION T
A/D RESULT JUSTIFICATION
T
AD
Right Justified
1
2 1 0 7
ADFM = 1
T
AD
b9
2
10-bit Result
T
ADRESL
AD
b8
3
T
AD
b7
AD
4
0
CYCLES
T
AD
b6
10-bit Result
5
T
AD
b5
6
is aborted, the next acquisition on the selected channel
is automatically started. The GO/DONE bit can then be
set to start the conversion.
In Figure 11-3, after the GO bit is set, the first time
segment has a minimum of T
Format Select bit (ADFM) controls this justification.
Figure 11-4 shows the operation of the A/D result
justification. The extra bits are loaded with ‘0’s. When
an A/D result will not overwrite these locations (A/D dis-
able), these registers may be used as two general
purpose 8-bit registers.
ADRES is loaded
GO bit is cleared
ADIF bit is set
Holding capacitor is connected to analog input
T
AD
b4
Note:
7
7
T
AD
b3
ADRESH
10-bit Result
8
The GO/DONE bit should NOT be set in
the same instruction that turns on the A/D.
T
AD
b2
ADFM = 0
9
Left Justified
T
0 7 6 5
AD
b1
10 T
2003 Microchip Technology Inc.
ADRESL
CY
AD
b0
0000 00
11
and a maximum of T
0
AD
.
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