PIC18F2523-I/SP Microchip Technology, PIC18F2523-I/SP Datasheet - Page 6
![IC PIC MCU FLASH 16KX16 28-DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC18F2523-I/SP
Manufacturer Part Number
PIC18F2523-I/SP
Description
IC PIC MCU FLASH 16KX16 28-DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F2221-ISO.pdf
(46 pages)
2.PIC18F2423-ISP.pdf
(54 pages)
3.PIC18F2423-ISP.pdf
(8 pages)
4.PIC18F2423-ISP.pdf
(34 pages)
5.PIC18F2523-ISO.pdf
(392 pages)
Specifications of PIC18F2523-I/SP
Program Memory Type
FLASH
Program Memory Size
32KB (16K x 16)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
EUSART/I2C/MSSP/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM163022, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10-ch x 12-bit
Package
28SPDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Operating Supply Voltage
2.5|3.3|5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM163025 - PIC DEM FULL SPEED USB DEMO BRD
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
PIC18F2XXX/4XXX FAMILY
For PIC18FX5X0/X5X3 devices, the code memory
space extends from 000000h to 007FFFh (32 Kbytes)
in four 8-Kbyte blocks. For PIC18FX4X5/X4X8
devices, the code memory space extends from
000000h to 005FFFh (24 Kbytes) in three 8-Kbyte
blocks.
however, define a “Boot Block” region that is treated
separately from Block 0. All of these blocks define code
protection boundaries within the code memory space.
FIGURE 2-5:
DS39622L-page 6
Note:
1FFFFFh
3FFFFFh
000000h
200000h
Addresses,
Sizes of memory areas are not to scale.
Unimplemented
Code Memory
Configuration
Read as ‘0’
and ID
Space
MEMORY MAP AND THE CODE MEMORY SPACE
FOR PIC18FX4X5/X4X8/X5X0/X5X3 DEVICES
000000h
through
008000h
0007FFh,
(PIC18FX5X0/X5X3)
Unimplemented
Reads all ‘0’s
32 Kbytes
Boot Block
Block 0
Block 1
Block 2
Block 3
TABLE 2-4:
MEMORY SIZE/DEVICE
PIC18F2455
PIC18F2458
PIC18F4455
PIC18F4458
PIC18F2510
PIC18F2520
PIC18F2523
PIC18F2550
PIC18F2553
PIC18F4510
PIC18F4520
PIC18F4523
PIC18F4550
PIC18F4553
Device
(PIC18FX4X5/X4X8)
IMPLEMENTATION OF CODE
MEMORY
Unimplemented
Reads all ‘0’s
24 Kbytes
Boot Block
Block 0
Block 1
Block 2
2010 Microchip Technology Inc.
Code Memory Size (Bytes)
000000h-005FFFh (24K)
000000h-007FFFh (32K)
000000h
0007FFh
000800h
001FFFh
002000h
003FFFh
004000h
005FFFh
006000h
007FFFh
1FFFFFh
Address
Range