PIC18LF2523-I/SO Microchip Technology, PIC18LF2523-I/SO Datasheet - Page 7
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PIC18LF2523-I/SO
Manufacturer Part Number
PIC18LF2523-I/SO
Description
IC PIC MCU FLASH 16KX16 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F2221-ISO.pdf
(46 pages)
2.PIC18F2423-ISP.pdf
(54 pages)
3.PIC18F2423-ISP.pdf
(8 pages)
4.PIC18F2423-ISP.pdf
(34 pages)
5.PIC18F2523-ISO.pdf
(392 pages)
Specifications of PIC18LF2523-I/SO
Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Controller Family/series
PIC18
No. Of I/o's
25
Eeprom Memory Size
256Byte
Ram Memory Size
1.5KB
Cpu Speed
40MHz
No. Of Timers
4
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM163022, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 10 Channel
A/d Bit Size
12 bit
A/d Channels Available
10
Height
2.31 mm
Length
17.9 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2 V
Width
7.5 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
2.4
Figure 2-6 shows the high-level overview of the
programming process. First, a Bulk Erase is performed.
Next, the code memory, ID locations and data EEPROM
are programmed (selected devices only, see Section 3.3
“Data EEPROM Programming”). These memories are
then verified to ensure that programming was successful.
If no errors are detected, the Configuration bits are then
programmed and verified.
FIGURE 2-6:
© 2005 Microchip Technology Inc.
Note 1:
High-Level Overview of the
Programming Process
Selected devices only, see Section 3.3
“Data EEPROM Programming”.
Program Data EE
Configuration Bits
Program Memory
Configuration Bits
Verify Program
Perform Bulk
Program IDs
Verify Data
Verify IDs
HIGH-LEVEL
PROGRAMMING FLOW
Program
Erase
Verify
Done
Start
(1)
PIC18F2423/2523/4423/4523
2.5
As shown in Figure 2-7, the High-Voltage ICSP
Program/Verify mode is entered by holding PGC and
PGD low and then raising MCLR/V
(high voltage). Once in this mode, the code memory,
data EEPROM (selected devices only, see Section 3.3
“Data EEPROM Programming”), ID locations and
Configuration bits can be accessed and programmed in
serial fashion. Figure 2-8 shows the exit sequence.
The sequence that enters the device into the Program/
Verify mode places all unused I/Os in the high-impedance
state.
FIGURE 2-7:
FIGURE 2-8:
MCLR/V
V
PGD
PGC
MCLR/V
D110
DD
V
PGD
PGC
DD
Entering and Exiting High-Voltage
ICSP Program/Verify Mode
D110
PP
PP
/RE3
/RE3
PGD = Input
PGD = Input
P13
P1
ENTERING HIGH-VOLTAGE
PROGRAM/VERIFY MODE
EXITING HIGH-VOLTAGE
PROGRAM/VERIFY MODE
P16
P1
P12
P17
DS39759A-page 7
PP
/RE3 to V
IHH