PIC18LF4331-I/P Microchip Technology, PIC18LF4331-I/P Datasheet - Page 114
![IC PIC MCU FLASH 4KX16 40DIP](/photos/6/61/66192/150-40-dip_sml.jpg)
PIC18LF4331-I/P
Manufacturer Part Number
PIC18LF4331-I/P
Description
IC PIC MCU FLASH 4KX16 40DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC18F2331-ISO.pdf
(392 pages)
4.PIC18F2331-ISO.pdf
(8 pages)
5.PIC18F2331-ISO.pdf
(6 pages)
6.PIC18F2331-ISO.pdf
(16 pages)
7.PIC18LF2331-ISO.pdf
(4 pages)
8.PIC18LF2331-ISO.pdf
(40 pages)
9.PIC18F4331-EP.pdf
(400 pages)
Specifications of PIC18LF4331-I/P
Core Size
8-Bit
Program Memory Size
8KB (4K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
Number Of I /o
36
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Controller Family/series
PIC18
No. Of I/o's
36
Eeprom Memory Size
256Byte
Ram Memory Size
768Byte
Cpu Speed
40MHz
No. Of Timers
4
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18LF4331-I/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Company:
Part Number:
PIC18LF4331-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC16F818-ISO PDF datasheet #2
- PIC18F2331-ISO PDF datasheet #3
- PIC18F2331-ISO PDF datasheet #4
- PIC18F2331-ISO PDF datasheet #5
- PIC18F2331-ISO PDF datasheet #6
- PIC18LF2331-ISO PDF datasheet #7
- PIC18LF2331-ISO PDF datasheet #8
- PIC18F4331-EP PDF datasheet #9
- Current page: 114 of 392
- Download datasheet (4Mb)
PIC18F2331/2431/4331/4431
TABLE 11-1:
DS39616D-page 114
RA0/AN0
RA1/AN1
RA2/AN2/V
CAP1/INDX
RA3/AN3/V
CAP2/QEA
RA4/AN4/CAP3/
QEB
RA5/AN5/LVDIN
OSC2/CLKO/RA6
Legend:
OSC1/CLKI/RA7
Pin
REF
REF
DIG = Digital level output; TTL = TTL input buffer; ST = Schmitt Trigger input buffer; ANA = Analog level input/output;
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
-/
+/
PORTA I/O SUMMARY
Function
LVDIN
V
OSC2
CLKO
OSC1
V
CAP1
CAP2
CAP3
INDX
QEA
QEB
CLKI
RA0
AN0
RA1
AN1
RA2
AN2
RA3
AN3
RA4
AN4
RA5
AN5
RA6
RA7
REF
REF
+
-
Setting
TRIS
0
1
1
0
1
1
0
1
1
1
1
1
0
1
1
1
1
1
0
1
1
1
1
0
1
1
1
x
x
0
1
x
x
0
1
I/O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Type
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
DIG
TTL
DIG
TTL
DIG
TTL
DIG
TTL
DIG
DIG
TTL
DIG
DIG
TTL
DIG
TTL
I/O
ST
ST
ST
ST
ST
ST
ST
LATA<0> data output; not affected by analog input.
PORTA<0> data input; disabled when analog input is enabled.
A/D Input Channel 0. Default input configuration on POR; does not
affect digital output.
LATA<1> data output; not affected by analog input.
PORTA<1> data input; disabled when analog input is enabled.
A/D Input Channel 1. Default input configuration on POR; does not
affect digital output.
LATA<2> data output; not affected by analog input.
PORTA<2> data input. Disabled when analog input is enabled.
A/D Input Channel 2. Default input configuration on POR.
A/D voltage reference low input.
Input Capture Pin 1. Disabled when analog input is enabled.
Quadrature Encoder Interface index input pin. Disabled when analog
input is enabled.
LATA<3> data output; not affected by analog input.
PORTA<3> data input; disabled when analog input is enabled.
A/D Input Channel 3. Default input configuration on POR.
A/D voltage reference high input.
Input Capture Pin 2. Disabled when analog input is enabled.
Quadrature Encoder Interface Channel A input pin. Disabled when
analog input is enabled.
LATA<4> data output; not affected by analog input.
PORTA<4> data input; disabled when analog input is enabled.
A/D Input Channel 4. Default input configuration on POR.
Input Capture Pin 3. Disabled when analog input is enabled.
Quadrature Encoder Interface Channel B input pin. Disabled when
analog input is enabled.
LATA<5> data output; not affected by analog input.
PORTA<5> data input; disabled when analog input is enabled.
A/D Input Channel 5. Default configuration on POR.
Low-Voltage Detect external trip point input.
Main oscillator feedback output connection (XT, HS and LP modes).
System cycle clock output (F
modes.
LATA<6> data output. Enabled in RCIO, INTIO2 and ECIO modes only.
PORTA<6> data input. Enabled in RCIO, INTIO2 and ECIO modes only.
Main oscillator input connection.
Main clock input connection.
LATA<7> data output. Disabled in external oscillator modes.
PORTA<7> data input. Disabled in external oscillator modes.
OSC
Description
/4) in RC, INTIO1 and EC Oscillator
2010 Microchip Technology Inc.
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