T89C51RD2-SMSIM Atmel, T89C51RD2-SMSIM Datasheet - Page 18
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T89C51RD2-SMSIM
Manufacturer Part Number
T89C51RD2-SMSIM
Description
IC MICRO CTRL 64K FLASH 68PLCC
Manufacturer
Atmel
Series
89Cr
Datasheet
1.T89C51RD2-SMSIM.pdf
(104 pages)
Specifications of T89C51RD2-SMSIM
Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
48
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
68-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
-
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Timer 2
18
Auto-Reload Mode
T89C51RD2
The timer 2 in the T89C51RD2 is compatible with the timer 2 in the 80C52.
It is a 16-bit timer/counter: the count is maintained by two eight-bit timer registers, TH2
and TL2, connected in cascade. It is controlled by T2CON register (See Table 8) and
T2MOD register (See Table 9). Timer 2 operation is similar to Timer 0 and Timer 1. C/T2
selects F
clock input. Setting TR2 allows TL2 to be incremented by the selected input.
Timer 2 has 3 operating modes: capture, autoreload and Baud Rate Generator. These
modes are selected by the combination of RCLK, TCLK and CP/RL2 (T2CON), as
described in the ATMEL Wireless and Micrcontrollers 8-bit Microcontroller Hardware
description.
Refer to the ATMEL Wireless and Micrcontrollers 8-bit Microcontroller Hardware
description for the description of Capture and Baud Rate Generator Modes.
In T89C51RD2 Timer 2 includes the following enhancements:
•
•
The auto-reload mode configures timer 2 as a 16-bit timer or event counter with auto-
matic reload. If DCEN bit in T2MOD is cleared, timer 2 behaves as in 80C52 (refer to the
ATMEL Wireless and Micrcontrollers 8-bit Microcontroller Hardware description). If
DCEN bit is set, timer 2 acts as an Up/down timer/counter as shown in Figure 5. In this
mode the T2EX pin controls the direction of count.
When T2EX is high, timer 2 counts up. Timer overflow occurs at FFFFh which sets the
TF2 flag and generates an interrupt request. The overflow also causes the 16-bit value
in RCAP2H and RCAP2L registers to be loaded into the timer registers TH2 and TL2.
When T2EX is low, timer 2 counts down. Timer underflow occurs when the count in the
timer registers TH2 and TL2 equals the value stored in RCAP2H and RCAP2L registers.
The underflow sets TF2 flag and reloads FFFFh into the timer registers.
The EXF2 bit toggles when timer 2 overflows or underflows according to the the direc-
tion of the count. EXF2 does not generate any interrupt. This bit can be used to provide
17-bit resolution.
Auto-reload mode with up or down counter
Programmable clock-output
OSC
/12 (timer operation) or external pin T2 (counter operation) as the timer
4243G–8051–05/03