PIC18F4550-I/P Microchip Technology, PIC18F4550-I/P Datasheet - Page 47
![IC PIC MCU FLASH 16KX16 40DIP](/photos/6/61/66192/150-40-dip_sml.jpg)
PIC18F4550-I/P
Manufacturer Part Number
PIC18F4550-I/P
Description
IC PIC MCU FLASH 16KX16 40DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PCM18XR1.pdf
(438 pages)
3.PIC18F2221-ISO.pdf
(46 pages)
4.PIC18F2455-ISO.pdf
(14 pages)
5.PIC18F2455-ISO.pdf
(8 pages)
6.PIC18F2455-ISO.pdf
(26 pages)
7.PIC18F4550-IP.pdf
(430 pages)
Specifications of PIC18F4550-I/P
Program Memory Type
FLASH
Program Memory Size
32KB (16K x 16)
Package / Case
40-DIP (0.600", 15.24mm)
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
35
Eeprom Size
256 x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SPI/I2C/EAUSART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
35
Number Of Timers
4
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163022
Minimum Operating Temperature
- 40 C
On-chip Adc
13-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
GPIODM-KPLCD - BOARD DEMO LCD GPIO EXP KEYPADI3-DB18F4550 - BOARD DAUGHTER ICEPIC3DM163025 - PIC DEM FULL SPEED USB DEMO BRDDVA18XP400 - DEVICE ADAPTER 18F4220 PDIP 40LD444-1001 - DEMO BOARD FOR PICMICRO MCUACICE0206 - ADAPTER MPLABICE 40P 600 MIL
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F4550-I/PT
Manufacturer:
MURATA
Quantity:
12 000
Company:
Part Number:
PIC18F4550-I/PT
Manufacturer:
Microchip Technology
Quantity:
36 332
Company:
Part Number:
PIC18F4550-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F4550-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC16F616T-ISL PDF datasheet
- PCM18XR1 PDF datasheet #2
- PIC18F2221-ISO PDF datasheet #3
- PIC18F2455-ISO PDF datasheet #4
- PIC18F2455-ISO PDF datasheet #5
- PIC18F2455-ISO PDF datasheet #6
- PIC18F4550-IP PDF datasheet #7
- Current page: 47 of 438
- Download datasheet (7Mb)
4.0
The PIC18F2455/2550/4455/4550 devices differentiate
between various kinds of Reset:
a)
b)
c)
d)
e)
f)
g)
h)
This section discusses Resets generated by MCLR,
POR and BOR and covers the operation of the various
start-up timers. Stack Reset events are covered in
Section 5.1.2.4 “Stack Full and Underflow Resets”.
WDT Resets are covered in Section 25.2 “Watchdog
Timer (WDT)”.
FIGURE 4-1:
© 2009 Microchip Technology Inc.
Note 1: This is the low-frequency INTRC source from the internal oscillator block.
OSC1
MCLR
V
Power-on Reset (POR)
MCLR Reset during normal operation
MCLR Reset during power-managed modes
Watchdog Timer (WDT) Reset (during
execution)
Programmable Brown-out Reset (BOR)
RESET Instruction
Stack Full Reset
Stack Underflow Reset
DD
2: See Table 4-2 for time-out situations.
RESET
Instruction
INTRC
RESET
OST/PWRT
Pointer
32 μs
Stack
( )_IDLE
Brown-out
V
Time-out
(1)
Detect
Sleep
DD
WDT
Reset
Rise
OST
PWRT
Stack Full/Underflow Reset
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
External Reset
MCLRE
10-Bit Ripple Counter
11-Bit Ripple Counter
POR Pulse
BOREN
1024 Cycles
65.5 ms
PIC18F2455/2550/4455/4550
A simplified block diagram of the on-chip Reset circuit
is shown in Figure 4-1.
4.1
Device Reset events are tracked through the RCON
register (Register 4-1). The lower five bits of the regis-
ter indicate that a specific Reset event has occurred. In
most cases, these bits can only be cleared by the event
and must be set by the application after the event. The
state of these flag bits, taken together, can be read to
indicate the type of Reset that just occurred. This is
described in more detail in Section 4.6 “Reset State
of Registers”.
The RCON register also has control bits for setting
interrupt priority (IPEN) and software control of the
BOR (SBOREN). Interrupt priority is discussed in
Section 9.0
Section 4.4 “Brown-out Reset (BOR)”.
RCON Register
“Interrupts”.
S
R
BOR
Q
DS39632E-page 45
is
Enable OST
Enable PWRT
Chip_Reset
covered
(2)
in
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