PIC18F2525-I/SP Microchip Technology, PIC18F2525-I/SP Datasheet - Page 2

• Manufacturer Part Number: PIC18F2525-I/SP
• Description: IC MCU FLASH 24KX16 28-DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2525-I/SP

• Program Memory Type: FLASH
• Program Memory Size: 48KB (24K x 16)
• Package / Case: 28-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 25
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3986 B
• Interface Type: SPI/I2C/EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 4
• Operating Supply Voltage: 4.2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163022, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10-ch x 10-bit
• Package: 28SPDIP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: I3DB18F4620 - BOARD DAUGHTER ICEPIC3DVA18XP280 - DEVICE ADAPTER 18F2220 PDIP 28LD
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F2525/2620/4525/4620
2. Module: MSSP
3. Module: MSSP
DS80200D-page 2
When the MSSP is configured for SPI™ Master
mode, the SDO pin cannot be disabled by setting
the TRISC<5> bit. The SDO pin always outputs
the content of SSPBUF regardless of the state of
the TRIS bit.
Work around
Use Rev. A4 silicon devices.
Date Codes that pertain to this issue:
All engineering and production devices.
After an I
register may be written for up to 10 T
additional writes are blocked. The data transfer
may be corrupted if SSPBUF is written during this
time.
The WCOL bit is set any time an SSPBUF write
occurs during a transfer.
Work around
Avoid writing SSPBUF until the data transfer is
complete, indicated by the setting of the SSPIF bit
(PIR1<3>).
Verify the WCOL bit (SSPCON1<7>) is clear after
writing SSPBUF to ensure any potential transfer in
progress is not corrupted.
Date Codes that pertain to this issue:
All engineering and production devices.
2
C transfer is initiated, the SSPBUF
CY
before
4. Module: MSSP
5. Module: ECCP
In 10-Bit Addressing mode, when a Repeated Start
is issued followed by the high address byte and a
write command (R/W = 0), an ACK is not issued.
Work around
There are two work arounds available:
1. Single Master Environment:
In a single master environment, the user must
issue a Stop, then a Start followed by a write to the
address high, then the address low followed by the
data.
2. Multi-Master Environment:
In a multi-master environment, the user must issue
a Repeated Start, send a dummy write command
to a different address, issue another Repeated
Start and then send a write to the original address.
This procedure will help maintain control of the
bus.
Date Codes that pertain to this issue:
All engineering and production devices.
When the CCP1 auto-shutdown feature is con-
figured for automatic restart by setting the PRSEN
bit (PWM1CON<7>), the pulse terminates immedi-
ately in a shutdown event. In addition, the pulse
may restart within the period if the shutdown
condition expires. This may result in the generation
of short pulses on the PWM output(s).
Work around
Configure the auto-shutdown for software restart
by clearing the PRSEN bit (PWM1CON<7>). The
PWM can be re-enabled by clearing the
ECCPASE bit (ECCP1AS<7>) after the shutdown
condition expires.
Date Codes that pertain to this issue:
All engineering and production devices.
© 2006 Microchip Technology Inc.