AT89C51CC03C-S3RIM Atmel, AT89C51CC03C-S3RIM Datasheet - Page 91

• Manufacturer Part Number: AT89C51CC03C-S3RIM
• Description: IC 8051 MCU FLASH 64K 52PLCC
• Manufacturer: Atmel
• Series: AT89C CANr

Specifications of AT89C51CC03C-S3RIM

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: AT89C51CC03CS3RTR

Bit Timing and Baud Rate
Figure 47. Sample And Transmission Point
4182E–CAN–05/04
CLOCK
FCAN
Prescaler BRP
•
•
•
To enable an interrupt on general error:
•
•
To enable an interrupt on Buffer-full condition:
•
•
To enable an interrupt when Timer overruns:
•
When an interrupt occurs, the corresponding message object bit is set in the SIT
register.
To acknowledge an interrupt, the corresponding CANSTCH bits (RXOK, TXOK,...) or
CANGIT bits (OVRTIM, OVRBUF,...), must be cleared by the software application.
When the CAN node is in transmission and detects a Form Error in its frame, a bit Error
will also be raised. Consequently, two consecutive interrupts can occur, both due to the
same error.
When a message object error occurs and is set in CANSTCH register, no general error
are set in CANGIE register.
The baud rate selection is made by Tbit calculation:
Tbit = Tsyns + Tprs + Tphs1 + Tphs2
1. Tsyns = Tscl = (BRP[5..0]+ 1)/Fcan = 1TQ.
2. Tprs = (1 to 8) * Tscl = (PRS[2..0]+ 1) * Tscl
3. Tphs1 = (1 to 8) * Tscl = (PHS1[2..0]+ 1) * Tscl
4. Tphs2 = (1 to 8) * Tscl = (PHS2[2..0]+ 1) * Tscl
5. Tsjw = (1 to 4) * Tscl = (SJW[1..0]+ 1) * Tscl
The total number of Tscl (Time Quanta) in a bit time must be comprised between 8 to
25.
Enable General CAN IT in the interrupt system register,
Enable interrupt by message object, EICHi,
Enable interrupt on error, ENERCH.
Enable General CAN IT in the interrupt system register,
Enable interrupt on error, ENERG.
Enable General CAN IT in the interrupt system register,
Enable interrupt on Buffer full, ENBUF.
Enable Overrun IT in the interrupt system register.
System clock Tscl
Time Quantum
PRS 3-bit length
PHS1 3-bit length
PHS2 3-bit length
SJW 2-bit length
Bit Timing
AT89C51CC03
Sample point
Transmission point
91