PIC32MX360F256L-80I/PT Microchip Technology, PIC32MX360F256L-80I/PT Datasheet - Page 107

• Manufacturer Part Number: PIC32MX360F256L-80I/PT
• Description: IC PIC MCU FLASH 256K 100-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX360F256L-80I/PT

• Program Memory Type: FLASH
• Program Memory Size: 256KB (256K x 8)
• Package / Case: 100-TFQFP
• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: I²C, IrDA, LIN, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 85
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC32MX3xx
• Core: MIPS
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C , SPI , UART
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 85
• Number Of Timers: 5 x 16 bit
• Operating Supply Voltage: 2.3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM320001, DM320002, MA320001
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Controller Family/series: PIC32
• No. Of I/o's: 85
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• No. Of Timers: 6
• Embedded Interface Type: EUART, I2C, PSP, SPI
• No. Of Pwm Channels: 5
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1000 - PIC32 BREAKOUT BOARDAC244003 - TEST BD MPLAB REAL ICE LOOPBACKAC244006 - KIT MPLAB REAL ICE TRACEDM320001 - KIT EVAL PIC32 STARTERAC164333 - MODULE SKT FOR PM3 100QFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

6.5
For optimal performance, PFMWS(CHECON<2:0>)
must be programmed to the minimum value possible.
There are two parameters that determine this value:
Flash Access Time – 50 nSec for the PIC32MX
processor family.
CPU Core frequency – The Core frequency is
programmable. Care must be taken when changing
frequencies to make sure that there are enough Wait
states to prevent any Flash memory access timing
violations.
To find out the number of flash Wait states required,
divide the core clock frequency (in MHz) by 20 and take
the integer part of the result. The value that is written
to PFMWS (CHECON<2:0>) is one less. For example,
core clock frequency is 72 MHZ. The number of Wait
states will be 72 / 20 = 3.6, i.e., 3 Wait states. Therefore
the actual value written to PFMWS bits will be 2.
© 2008 Microchip Technology Inc.
Program Flash Memory Wait
States
Advance Information
6.6
The Program Flash Memory can be partitioned for User
and Kernel mode programs as shown in Figure 6-3.
At Reset, the User mode partition does not exist (BMX-
PUPBA is initialized to ‘0’). The entire Program Flash
Memory is mapped to Kernel mode program space
starting at virtual address KSEG1: 0xBD000000 (or
KSEG0: 0x9D000000). To set up a partition for the
User mode program, initialize BMXPUPBA as follows:
BMXPUPBA = BMXPFMSZ – USER_FLASH_PGM_SZ
The USER_FLASH_PGM_SZ is the partition size of
the User mode program. BMXPFMSZ is the bus matrix
register that holds the total size of Program Flash
Memory.
Example:
The size of the user Flash will be 20K and the size left
for the kernel Flash will be 512k – 20k = 492K.
The user Flash partition will extend from 0x7D07B000
to 0x7d07FFFF (virtual addresses).
The Kernel mode partition always starts from KSEG1:
0xBD000000 or KSEG0: 0x9D000000. In the above
example, the kernel partition will extend from
0xBD000000 to 0xBD07AFFF (492 Kbytes in size).
Assuming the PIC32MX device has 512 Kbytes of
Flash memory, the BMXPFMSZ will contain
0x00080000.
To create a user Flash program partition of
20 Kbytes (0x5000):
BMXPUPBA = 0x80000 – 0x5000 = 0x7B000
PIC32MX FAMILY
Program Flash Memory
Partitioning
DS61143B-page 105