AT89C51IC2-RLTUM Atmel, AT89C51IC2-RLTUM Datasheet - Page 80

• Manufacturer Part Number: AT89C51IC2-RLTUM
• Description: IC 8051 MCU FLASH 32K 44VQFP
• Manufacturer: Atmel
• Series: 89Cr

Specifications of AT89C51IC2-RLTUM

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 60MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Processor Series: AT89x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 1.25 KB
• Interface Type: SPI, UART
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 8
• Number Of Timers: 3 bit
• Operating Supply Voltage: 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• For Use With: AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Keyboard Interface
Interrupt
Power Reduction Mode
80
AT89C51IC2
P1:x
The AT89C51IC2 implements a keyboard interface allowing the connection of a
8 x n matrix keyboard. It is based on 8 inputs with programmable interrupt capability on
both high or low level. These inputs are available as alternate function of P1 and allow to
exit from idle and power down modes.
The keyboard interface interfaces with the C51 core through 3 special function registers:
KBLS, the Keyboard Level Selection register (Table 63), KBE, The Keyboard interrupt
Enable register (Table 62), and KBF, the Keyboard Flag register (Table 61).
The keyboard inputs are considered as 8 independent interrupt sources sharing the
same interrupt vector. An interrupt enable bit (KBD in IEN1) allows global enable or dis-
able of the keyboard interrupt (see Figure 33). As detailed in Figure 34 each keyboard
input has the capability to detect a programmable level according to KBLS.x bit value.
Level detection is then reported in interrupt flags KBF.x that can be masked by software
using KBE.x bits.
This structure allow keyboard arrangement from 1 by n to 8 by n matrix and allow usage
of P1 inputs for other purpose.
Figure 33. Keyboard Interface Block Diagram
Figure 34. Keyboard Input Circuitry
P1 inputs allow exit from idle and power down modes as detailed in Section “Power
Management”, page 67.
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
Vcc
Internal Pullup
Input Circuitry
Input Circuitry
Input Circuitry
Input Circuitry
Input Circuitry
Input Circuitry
Input Circuitry
Input Circuitry
KBLS.x
0
1
KBF.x
KBE.x
IEN1
KBD
Keyboard Interface
Interrupt Request
KBDIT
4301D–8051–02/08