PIC32MX440F512H-80I/MR Microchip Technology, PIC32MX440F512H-80I/MR Datasheet - Page 2

• Manufacturer Part Number: PIC32MX440F512H-80I/MR
• Description: IC PIC MCU FLASH 512KX32 64-QFN
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX440F512H-80I/MR

• Core Size: 32-Bit
• Program Memory Size: 512KB (512K x 8)
• Core Processor: MIPS32® M4K™
• Speed: 80MHz
• Connectivity: I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Controller Family/series: PIC32
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• No. Of Timers: 5
• Interface: EUSART, I2C, SPI, USB
• No. Of Pwm Channels: 5
• Embedded Interface Type: EUSART, I2C, SPI, USB
• Rohs Compliant: Yes
• Processor Series: PIC32MX4xx
• Core: MIPS
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C, JTAG, SPI, TWI, UART, USB
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 51
• Number Of Timers: 5
• Operating Supply Voltage: 2.3 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM320003, DM320002, MA320002
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1000 - PIC32 BREAKOUT BOARD
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC32MX3XX/4XX
TABLE 1:
TABLE 2:
DS80440D-page 2
PIC32MX440F256H
PIC32MX440F512H
PIC32MX440F128H
PIC32MX420F032H
Note 1:
Note 1:
Bus Matrix
Regulator
Oscillator
Compare
External
Module
Voltage
Device
Device
Device
Output
Reset
Reset
Reset
ADC
DMA
PMP
Part Number
Refer to the “PIC32MX Flash Programming Specification” (DS61145) for detailed information on Device
and Revision IDs for your specific device.
Only those issues indicated in the last column apply to the current silicon revision.
Pattern Match
Configuration
Offset Errors
Slave Mode
PWM Mode
SILICON DEVREV VALUES (CONTINUED)
SILICON ISSUE SUMMARY
Clock Fail
Gain and
Software
Feature
MCLR
Detect
Reset
Mode
—
—
Number
Item
10.
1.
2.
3.
4.
5.
6.
7.
8.
9.
A Reset (MCLR) Pulse that is shorter than 2 SYSCLK will
not reset the device properly.
All Resets, except Power-on Reset (POR), can cause a
Fail-Safe Clock Monitor event (if enabled) when the
duration of the Reset pulse exceeds the clock period of the
internal fail-safe clock reference clock (31 kHz).
Attempting to perform a software device Reset with PBDIV
set to 1:1, and SYSCLK less than 1 MHz will not reset the
device properly.
A V
reset when using an external core voltage supply.
When running the Analog-to-Digital Converter (ADC)
module in Internal Reference mode, the gain error is 3-4
LSb and the offset error is 1-2 LSb across voltage and
speed.
The BMXDUDBA, BMXDUPBA and BMXPUPBA registers
can be set to values that are outside the device’s actual
memory size limit.
After a clock failure event, any write to the OSCCON
register erroneously clears the fail-safe condition and
attempts to switch to a new clock source that is specified
by the NOSC bits in the OSCCON register.
In Pattern Match mode, the DMA will generate up to three
additional byte writes to the destination address, after the
Pattern Detection event has occurred, when performing
transfers with the DCHxSSIZ set to greater than 1.
The Output Compare module in PWM mode outputs a
high of period register (PRx) length when attempting to
use PWM values of 0x00 followed by 0x01.
In PMP Slave 4B Buffer mode, if the underflow Status bit
OBF (PMSTAT<6>) is cleared at the same time a PMP
read is attempted, the PMP could receive incorrect data.
DDCORE
Device ID
0x094D053
0x0952053
0x0956053
0x0942053
voltage less than 1.75V will cause the CPU to
(1)
Issue Summary
0x3
B2
Revision ID for Silicon Revision
0x4
B3
© 2010 Microchip Technology Inc.
0x5
B4
B2 B3 B4 B6
X
X
X
X
X
X
X
X
X
X
Revisions
Affected
X
X
X
X
X
X
X
X
X
X
(1)
0x5
X
X
X
X
X
X
X
X
X
X
B6
(1)
X
X
X
X
X
X
X
X
X
X