PIC32MX440F512H-80I/MR Microchip Technology, PIC32MX440F512H-80I/MR Datasheet - Page 8

IC PIC MCU FLASH 512KX32 64-QFN

PIC32MX440F512H-80I/MR

Manufacturer Part Number
PIC32MX440F512H-80I/MR
Description
IC PIC MCU FLASH 512KX32 64-QFN
Manufacturer
Microchip Technology
Series
PIC® 32MXr

Specifications of PIC32MX440F512H-80I/MR

Core Size
32-Bit
Program Memory Size
512KB (512K x 8)
Core Processor
MIPS32® M4K™
Speed
80MHz
Connectivity
I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
53
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Controller Family/series
PIC32
Ram Memory Size
32KB
Cpu Speed
80MHz
No. Of Timers
5
Interface
EUSART, I2C, SPI, USB
No. Of Pwm Channels
5
Embedded Interface Type
EUSART, I2C, SPI, USB
Rohs Compliant
Yes
Processor Series
PIC32MX4xx
Core
MIPS
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
I2C, JTAG, SPI, TWI, UART, USB
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
51
Number Of Timers
5
Operating Supply Voltage
2.3 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM320003, DM320002, MA320002
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1000 - PIC32 BREAKOUT BOARD
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
PIC32MX3XX/4XX
11. Module: I/O PORTs
12. Module: Timers
13. Module: Timers
DS80440D-page 8
When using the hardware assisted read-modify-
write registers, PORTxINV, PORTxSET and
PORTxCLR, the source used for the operation is
the LATx register, not the PORTx register. This
only affects users who want to use the pins in a
bidirectional mode or to store sampled PORTx
data in the LATx register.
Work around
Use a software read-modify-write sequence, such
as:
//replaces PORTAINV = mask;
x = PORTA ^ mask;
LATA = x;
//replaces PORTASET = mask;
x = PORTA | mask;
LATA = x;
//replaces PORTACLR = mask;
x = PORTA & ~mask;
LATA = x;
Affected Silicon Revisions
The TMRx register stays at zero for two timer clock
cycles when the PRx register is 0x0000.
Work around
None.
Affected Silicon Revisions
The timer prescaler may not be reset correctly
when it is used with a slow external clock. This can
occur when the timer is disabled and then re-
enabled. The result could be a spurious count in
the prescaler.
Work around
To ensure a Reset of the prescaler, firmware
must wait for at least 2 input clock periods
before re-enabling the timer.
Affected Silicon Revisions
B2
B2
B2
Note:
X
X
X
B3
B3
B3
X
X
X
These sequences are not atomic.
B4
B4
B4
X
X
X
B6
B6
B6
X
X
X
14. Module: Timers
15. Module: UART
16. Module: Watchdog Timer (WDT)
The Timer1 prescaler may not be reset correctly
when it is used with a slow external clock. This can
occur when the timer is disabled and then re-
enabled. The result could be a spurious count in
the prescaler.
Work around
None.
Affected Silicon Revisions
The CTS pin does not deassert until at least 2
bytes are free in the UART FIFO.
Work around
The UART TXREG must be read at least 2 times
to rearm the hardware handshaking lines.
Affected Silicon Revisions
An incorrect WDT Time-out Reset may occur
when both of these conditions are present:
1. WDT is enabled.
2. Either a MCLR (EXTR) or Software Reset
Work around
To detect incorrect WDT Time-out Reset, always
confirm that only the WDTO bit is set in the RCON
register. If EXTR, SWR, or any other Reset bits are
set, it indicates that an incorrect WDT has
occurred.
Affected Silicon Revisions
B2
B2
B2
X
X
X
(SWR) occurs just before WDT is about to
expire.
B3
B3
B3
X
X
X
B4
B4
B4
X
X
X
© 2010 Microchip Technology Inc.
B6
B6
B6
X
X
X

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