ATMEGA645V-8AU Atmel, ATMEGA645V-8AU Datasheet - Page 266
![IC AVR MCU FLASH 64K 64TQFP](/photos/12/13/121332/313-64-tqfp_sml.jpg)
ATMEGA645V-8AU
Manufacturer Part Number
ATMEGA645V-8AU
Description
IC AVR MCU FLASH 64K 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA325-16MU.pdf
(362 pages)
Specifications of ATMEGA645V-8AU
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
ATMEGA64x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
SPI, UART, USI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
54
Number Of Timers
3
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Controller Family/series
AVR MEGA
No. Of I/o's
54
Eeprom Memory Size
2KB
Ram Memory Size
4KB
Cpu Speed
8MHz
No. Of Timers
3
Rohs Compliant
Yes
Data Rom Size
2 KB
Height
1 mm
Length
14 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.7 V
Width
14 mm
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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Manufacturer
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26.2
2570M–AVR–04/11
Fuse Bits
Table 26-2.
Note:
The Atmel ATmega325/3250/645/6450 has three Fuse bytes.
briefly the functionality of all the fuses and how they are mapped into the Fuse bytes. Note that
the fuses are read as logical zero, “0”, if they are programmed.
Table 26-3.
Note:
BLB1 Mode
Extended Fuse Byte
–
–
–
–
–
BODLEVEL1
BODLEVEL0
RSTDISBL
1
2
3
4
Memory Lock Bits
1. Program the Fuse bits and Boot Lock bits before programming the LB1 and LB2.
2. “1” means unprogrammed, “0” means programmed
1. See
2. Port G, PG5 is input only. Pull-up is always on.
(2)
76.
(1)
(1)
Lock Bit Protection Modes
Extended Fuse Byte
BLB12
Table 27-5 on page 301
1
1
0
0
Bit No
7
6
5
4
5
2
1
0
BLB11
1
0
0
1
Description
–
–
–
–
–
Brown-out Detector trigger level
Brown-out Detector trigger level
External Reset Disable
Protection Type
No restrictions for SPM or LPM accessing the Boot Loader
section.
SPM is not allowed to write to the Boot Loader section.
SPM is not allowed to write to the Boot Loader section,
and LPM executing from the Application section is not
allowed to read from the Boot Loader section. If Interrupt
Vectors are placed in the Application section, interrupts
are disabled while executing from the Boot Loader section.
LPM executing from the Application section is not allowed
to read from the Boot Loader section. If Interrupt Vectors
are placed in the Application section, interrupts are
disabled while executing from the Boot Loader section.
for BODLEVEL Fuse decoding.
(1)(2)
ATmega325/3250/645/6450
(Continued)
See “Alternate Functions of Port G” on page
Table 26-3
Default Value
1
1
1
1
1
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
-
Table 26-5
describe
266
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