PIC17C42A-16/P Microchip Technology, PIC17C42A-16/P Datasheet - Page 113

IC MCU OTP 2KX16 PWM 40DIP

PIC17C42A-16/P

Manufacturer Part Number
PIC17C42A-16/P
Description
IC MCU OTP 2KX16 PWM 40DIP
Manufacturer
Microchip Technology
Series
PIC® 17Cr

Specifications of PIC17C42A-16/P

Core Size
8-Bit
Program Memory Size
4KB (2K x 16)
Core Processor
PIC
Speed
16MHz
Connectivity
UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
33
Program Memory Type
OTP
Ram Size
232 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 6 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
40-DIP (0.600", 15.24mm)
Controller Family/series
PIC17
No. Of I/o's
33
Ram Memory Size
232Byte
Cpu Speed
16MHz
No. Of Timers
4
No. Of Pwm Channels
2
Embedded Interface Type
USART
Rohs Compliant
Yes
Processor Series
PIC17C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
232 B
Interface Type
SCI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
33
Number Of Timers
4
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DVA17XP401 - DEVICE ADAPTER FOR PIC17C42AAC174001 - MODULE SKT PROMATEII 40DIP
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC17C42A-16/PQ
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC17C42A-16/PQ
Manufacturer:
MICROCH
Quantity:
20 000
Part Number:
PIC17C42A-16/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
ADDWFC
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
1996 Microchip Technology Inc.
Before Instruction
After Instruction
Decode
Carry bit =
REG
WREG
Carry bit =
REG
WREG
Q1
=
=
=
=
register 'f'
ADD WREG and Carry bit to f
[ label ] ADDWFC
0
d
(WREG) + (f) + C
Add WREG, the Carry Flag and data
memory location 'f'. If 'd' is 0, the result is
placed in WREG. If 'd' is 1, the result is
placed in data memory location 'f'.
1
1
ADDWFC
OV, C, DC, Z
Read
Q2
0001
1
0x02
0x4D
0
0x02
0x50
f
255
000d
REG
Execute
Q3
0
f,d
(dest)
ffff
destination
Write to
Q4
ffff
ANDLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
Before Instruction
After Instruction
Decode
WREG
WREG
Q1
=
=
Read literal
And Literal with WREG
[ label ] ANDLW
0
(WREG) .AND. (k)
Z
The contents of WREG are AND’ed with
the 8-bit literal 'k'. The result is placed in
WREG.
1
1
ANDLW
1011
Q2
'k'
0xA3
0x03
k
255
PIC17C4X
0101
0x5F
Execute
Q3
DS30412C-page 113
k
kkkk
(WREG)
Write to
WREG
Q4
kkkk

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