DSPIC30F5013-30I/PT Microchip Technology, DSPIC30F5013-30I/PT Datasheet - Page 50

• Manufacturer Part Number: DSPIC30F5013-30I/PT
• Description: IC DSPIC MCU/DSP 66K 80TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F5013-30I/PT

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, I²S, LVD, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 66KB (22K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of I/o's: 68
• Flash Memory Size: 66KB
• Supply Voltage Range: 2.5V To 5.5V
• Package: 80TQFP
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 30 MHz
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 68
• Interface Type: CAN/I2C/SPI/UART
• On-chip Adc: 16-chx12-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300024 - KIT DEMO DSPICDEM 1.1XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164320 - MODULE SKT MPLAB PM3 80TQFPDM300004-2 - BOARD DEMO DSPICDEM.NET 2DM300004-1 - BOARD DEMO DSPICDEM.NET 1AC30F007 - MODULE SKT FOR DSPIC30F 80TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: DSPIC30F501330IPT

dsPIC30F5011/5013
6.6.3
Example 6-2
can be used to load the 96 bytes of write latches. 32
TBLWTL and 32 TBLWTH instructions are needed to
load the write latches selected by the table pointer.
EXAMPLE 6-2:
6.6.4
For protection, the write initiate sequence for NVMKEY
must be used to allow any erase or program operation
to proceed. After the programming command has been
executed, the user must wait for the programming time
until programming is complete. The two instructions fol-
lowing the start of the programming sequence should
be NOPs.
EXAMPLE 6-3:
DS70116J-page 50
; Set up a pointer to the first program memory location to be written
; program memory selected, and writes enabled
; Perform the TBLWT instructions to write the latches
; 0th_program_word
; 1st_program_word
;
; 31st_program_word
Note: In
2nd_program_word
Example
MOV
MOV
MOV
MOV
MOV
TBLWTL W2
TBLWTH W3
MOV
MOV
TBLWTL W2
TBLWTH W3
MOV
MOV
TBLWTL W2
TBLWTH W3
•
•
•
MOV
MOV
TBLWTL W2
TBLWTH W3
DISI
MOV
MOV
MOV
MOV
BSET
NOP
NOP
LOADING WRITE LATCHES
INITIATING THE PROGRAMMING
SEQUENCE
shows a sequence of instructions that
#0x0000,W0
W0
#0x6000,W0
#LOW_WORD_0,W2
#HIGH_BYTE_0,W3
#LOW_WORD_1,W2
#HIGH_BYTE_1,W3
#LOW_WORD_2,W2
#HIGH_BYTE_2,W3
#LOW_WORD_31,W2
#HIGH_BYTE_31,W3
#5
#0x55,W0
W0
#0xAA,W1
W1
NVMCON,#WR
6-2, the contents of the upper byte of W3 has no effect.
,
,
,
,
,
,
,
,
,
,
,
LOADING WRITE LATCHES
INITIATING A PROGRAMMING SEQUENCE
TBLPAG
[W0]
[W0++]
[W0]
[W0++]
NVMKEY
NVMKEY
[W0]
[W0++]
[W0]
[W0++]
; Block all interrupts with priority <7 for
; next 5 instructions
;
; Write the 0x55 key
;
; Write the 0xAA key
; Start the erase sequence
; Insert two NOPs after the erase
; command is asserted
;
; Initialize PM Page Boundary SFR
; An example program memory address
;
;
; Write PM low word into program latch
; Write PM high byte into program latch
;
;
; Write PM low word into program latch
; Write PM high byte into program latch
;
;
; Write PM low word into program latch
; Write PM high byte into program latch
;
;
; Write PM low word into program latch
; Write PM high byte into program latch
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