PIC16LC74A-04I/L Microchip Technology, PIC16LC74A-04I/L Datasheet - Page 264
![IC MCU OTP 4KX14 A/D PWM 44PLCC](/photos/6/63/66325/150-44-plcc_sml.jpg)
PIC16LC74A-04I/L
Manufacturer Part Number
PIC16LC74A-04I/L
Description
IC MCU OTP 4KX14 A/D PWM 44PLCC
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets
1.PIC16LF627A-IP.pdf
(8 pages)
2.PIC16C72-04SO.pdf
(289 pages)
3.PIC16LC74A-04P.pdf
(8 pages)
Specifications of PIC16LC74A-04I/L
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
7KB (4K x 14)
Program Memory Type
OTP
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 6 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Core
PIC
Processor Series
PIC16LC
Data Bus Width
8 bit
Maximum Clock Frequency
20 MHz
Data Ram Size
192 B
Data Rom Size
192 B
On-chip Adc
Yes
Number Of Programmable I/os
33
Number Of Timers
3
Mounting Style
SMD/SMT
A/d Bit Size
8 bit
A/d Channels Available
8
Height
3.87 mm
Interface Type
I2C, SPI, USART
Length
16.59 mm
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
6 V
Supply Voltage (min)
2.5 V
Width
16.59 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16LC74A-04I/L
Manufacturer:
Microchip Technology
Quantity:
10 000
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PIC16C7X
APPENDIX C: WHAT’S NEW
Added the following devices:
• PIC16C76
• PIC16C77
Removed the PIC16C710, PIC16C71, PIC16C711
from this datasheet.
Added PIC16C76 and PIC16C77 devices. The
PIC16C76/77 devices have 368 bytes of data memory
distributed in 4 banks and 8K of program memory in 4
pages. These two devices have an enhanced SPI that
supports both clock phase and polarity. The USART
has been enhanced.
When upgrading to the PIC16C76/77 please note that
the upper 16 bytes of data memory in banks 1,2, and 3
are mapped into bank 0. This may require relocation of
data memory usage in the user application code.
Added Q-cycle definitions to the Instruction Set Sum-
mary section.
DS30390E-page 264
APPENDIX D: WHAT’S CHANGED
Minor changes, spelling and grammatical changes.
Added the following note to the USART section. This
note applies to all devices except the PIC16C76 and
PIC16C77.
For the PIC16C73/73A/74/74A the asynchronous high
speed mode (BRGH = 1) may experience a high rate of
receive errors. It is recommended that BRGH = 0. If you
desire a higher baud rate than BRGH = 0 can support,
refer to the device errata for additional information or
use the PIC16C76/77.
Divided SPI section into SPI for the PIC16C76/77 and
SPI for all other devices.
1997 Microchip Technology Inc.
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